Introduction - If you have any usage issues, please Google them yourself
A complete viterbi coding procedures, the use of VHDL language, as well as test procedures
Packet : 43680558viterbi.rar filelist
Quartus_II\run_script.tcl
Quartus_II\viterbi_node_sync.qpf
Quartus_II\viterbi_node_sync.qsf
Quartus_II\wave.do
source\a_rcvsym.txt
source\a_txsym.txt
source\ber_node_sync.vhd
source\BER_report.txt
source\ber_threshold.vhd
source\block_period_stim.txt
source\mux_2d.vhd
source\rotate_node_sync.vhd
source\tcm_rcv_sector.txt
source\transbit.txt
source\viterbi_BER.bsf
source\viterbi_BER.cmp
source\viterbi_BER.html
source\viterbi_BER.inc
source\viterbi_BER.vhd
source\viterbi_BER.vho
source\viterbi_BER_bb.v
source\viterbi_BER_inst.vhd
source\viterbi_BER_logiclock_script.tcl
source\viterbi_BER_testbench.vhd
source\viterbi_BER_vital_script.tcl
source\viterbi_BER_vsim_script.tcl
source\viterbi_node_sync.vhd
testbench\auk_vit_vit_var_enc_arc_rtl.vhd
testbench\auk_vit_vit_var_enc_ent.vhd
testbench\Bench_vit_par_atl_arc_ben_node_sync.vhd
testbench\Bench_vit_par_atl_ent_node_sync.vhd
testbench\viterbi_node_sync_testbench.vhd
testbench\vi_bench.vhd
testbench\vi_functions.vhd
testbench\vi_interface.vhd
Quartus_II
source
testbench