pic cpu source code. it is writed in the verilog source code. it can work on the 40Mhz high speed.

Packet : 29782196cpuverilog.rar filelist
verilog\CVS\Root
verilog\CVS\Repository
verilog\CVS\Template
verilog\CVS\Entries.Old
verilog\CVS\Entries
verilog\CVS\Entries.Extra.Old
verilog\CVS\Entries.Extra
verilog\CVS\Entries.Log
verilog\CVS
verilog\core\CVS\Root
verilog\core\CVS\Repository
verilog\core\CVS\Template
verilog\core\CVS\Entries.Old
verilog\core\CVS\Entries
verilog\core\CVS\Entries.Extra.Old
verilog\core\CVS\Entries.Extra
verilog\core\CVS
verilog\core\alu.v
verilog\core\presclr_wdt.v
verilog\core\primitives.v
verilog\core\primitives_xilinx.v
verilog\core\register_file.v
verilog\core\risc_core.v
verilog\core\risc_core_top.v
verilog\core
verilog\testbench\CVS\Root
verilog\testbench\CVS\Repository
verilog\testbench\CVS\Template
verilog\testbench\CVS\Entries.Old
verilog\testbench\CVS\Entries
verilog\testbench\CVS\Entries.Extra.Old
verilog\testbench\CVS\Entries.Extra
verilog\testbench\CVS
verilog\testbench\prog_mem.v
verilog\testbench\test.v
verilog\testbench
verilog

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