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Title:
Verilog代码编写规范
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Category:
编程文档
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[WORD]
File Size:
5.85kb
Update:
2011-04-06
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Uploaded by:
zhuyulou@yahoo.com.cn
Description:
在一个项目组内部、一个项目的进程中,应该有一套类似的代码编写规范来作为约束。 总的方向是,努力写整洁、可读性好的代码
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