ADD_SUB 11,13,16-CLA for the Verilog HDL source co

ADD_SUB

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Update : 2008-10-13
Size : 4.02kb
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11,13,16-CLA for the Verilog HDL source code.

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Packet : 15883852add_sub.rar filelist
ADD_SUB
ADD_SUB\add_sub.v
ADD_SUB\ADD_SUB.qpf
ADD_SUB\ADD_SUB.qsf
ADD_SUB\db
ADD_SUB\db\ADD_SUB.project.hdb
ADD_SUB\db\ADD_SUB.db_info
ADD_SUB\ADD_SUB.qws
ADD_SUB\cmp_state.ini

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