Use the verilog language write a MIPS CPU code, and have additional instruction, for example: selection sort instruction. The code has contain combination circuit and sequenial circuit. CPU have contain ALU, ADD, ALU_CONTROL, DATA_MEMORY, INST_MEMORY, REGISTER, PC, and TESTBRANCH.

signal_cpu_sort
...............\Add.v
...............\Alu.v
...............\Alu_control.v
...............\Control.v
...............\Data_memory.v
...............\Instruction_memory.v
...............\Line_control.v
...............\Pc.v
...............\Registers.v
...............\Sign_extend.v
...............\Single_cycle_cpu.v
...............\test.prj
...............\test.v
...............\testbranch.v

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