classic Verilog language-learning courseware, introduced a basic knowledge of language, and the reality of the language of applications including DSP design in all its aspects.

verilogppt2
...........\Combined add and subtractor.ppt
...........\FIFO设计.ppt
...........\FSM设计描述.ppt
...........\How To Design A HDL Module？.ppt
...........\switch_level.ppt
...........\TestBench.ppt
...........\Testbenches.ppt
...........\verilog_coding_style.ppt
...........\Verilog_coding_style_0902.ppt
...........\VSLIDES.PPT
...........\时序电路设计描述.ppt
...........\模拟及数模混合集成电路设计分析.doc
...........\第二个题目.ppt
...........\组合电路设计描述的优化问题.ppt
...........\组合逻辑电路描述.ppt
...........\连续输入数据处理.ppt

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