Introduction - If you have any usage issues, please Google them yourself
digital phase-locked loop DPLL VERLOG code MODELSIM under the projects, a test document
Packet : 59564346dll11254.rar filelist
dll\dll.mpf
dll\dll.v
dll\test_dll.v
dll\transcript
dll\vsim.wlf
dll\work\_info
dll\work\test_dll\_primary.dat
dll\work\test_dll\_primary.vhd
dll\work\test_dll\verilog.asm
dll\work\test_dll
dll\work\@p@l@l\_primary.dat
dll\work\@p@l@l\_primary.vhd
dll\work\@p@l@l\verilog.asm
dll\work\@p@l@l
dll\work
dll\dll.cr.mti
dll