This a CY7C68013 (USB2.0 Chip) Configuration example for Slave FIFO Mode with Sync Signal.

USB2.0 Slave FIFO_Sync
......................\build.bat
......................\dscr.a51
......................\DSCR.LST
......................\DSCR.OBJ
......................\Ezusb.lib
......................\fifo.c2
......................\fw.c
......................\FW.LST
......................\FW.OBJ
......................\FX2 xFIFO 8-bit Async Build ENV.pif
......................\Fx2.h
......................\fx2regs.h
......................\fx2sdly.h
......................\Hex2bix.exe
......................\readme.txt
......................\tcxmaster
......................\tcxmaster.c
......................\tcxmaster.hex
......................\tcxmaster.iic
......................\tcxmaster.lnp
......................\tcxmaster.LST
......................\tcxmaster.M51
......................\tcxmaster.OBJ
......................\tcxmaster.Opt
......................\tcxmaster.plg
......................\tcxmaster.Uv2
......................\tcxmaster_Opt.Bak
......................\tcxmaster_Uv2.Bak
......................\USBJmpTb.OBJ

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