A very good VHDL procedures. 64HZ can be divided into 0.1Hz

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...\db
...\..\ten.asm.qmsg
...\..\ten.cbx.xml
...\..\ten.cmp.cdb
...\..\ten.cmp.hdb
...\..\ten.cmp.kpt
...\..\ten.cmp.logdb
...\..\ten.cmp.rdb
...\..\ten.cmp.tdb
...\..\ten.cmp0.ddb
...\..\ten.dbp
...\..\ten.db_info
...\..\ten.eco.cdb
...\..\ten.eds_overflow
...\..\ten.fit.qmsg
...\..\ten.hier_info
...\..\ten.hif
...\..\ten.map.cdb
...\..\ten.map.hdb
...\..\ten.map.logdb
...\..\ten.map.qmsg
...\..\ten.pre_map.cdb
...\..\ten.pre_map.hdb
...\..\ten.psp
...\..\ten.rtlv.hdb
...\..\ten.rtlv_sg.cdb
...\..\ten.rtlv_sg_swap.cdb
...\..\ten.sgdiff.cdb
...\..\ten.sgdiff.hdb
...\..\ten.signalprobe.cdb
...\..\ten.sim.hdb
...\..\ten.sim.qmsg
...\..\ten.sim.rdb
...\..\ten.sim.vwf
...\..\ten.sld_design_entry.sci
...\..\ten.sld_design_entry_dsc.sci
...\..\ten.syn_hier_info
...\..\ten.tan.qmsg
...\..\wed.zsf
...\ten.asm.rpt
...\ten.done
...\ten.fit.rpt
...\ten.fit.smsg
...\ten.fit.summary
...\ten.flow.rpt
...\ten.map.rpt
...\ten.map.summary
...\ten.pin
...\ten.pof
...\ten.qpf
...\ten.qsf
...\ten.qws
...\ten.sim.rpt
...\ten.sof
...\ten.tan.rpt
...\ten.tan.summary
...\ten.vhd
...\ten.vwf

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