The guide will be deposited into the FLASH code, the realization of power FPGA and DSP chip between the automatic configuration to achieve the FPGA and DSP Central Communications

fpga_loader
...........\boot.asm
...........\build-fpga_loader.tcf
...........\cc_build_Debug.log
...........\Debug
...........\Debug.lkf
...........\evmdm642.h
...........\fpga_loader.c
...........\fpga_loader.cdb
...........\fpga_loader.CS_
...........\...............\FILE.CDX
...........\...............\FILE.DBF
...........\...............\FILE.FPT
...........\...............\SYMBOL.CDX
...........\...............\SYMBOL.DBF
...........\...............\SYMBOL.FPT
...........\fpga_loader.paf2
...........\fpga_loader.pjt
...........\fpga_loader.sbl
...........\fpga_loadercfg.cmd
...........\fpga_loadercfg.h
...........\fpga_loadercfg.h62
...........\fpga_loadercfg.s62
...........\fpga_loadercfg_c.c
...........\fpga_loader_ahex.cmd
...........\fpga_loader_ahex.hex
...........\fpga_loader_ahext.hex
...........\fpga_loader_ahext1.hex
...........\hex6x.exe
...........\userlinker.cmd

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