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DDALINE
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Using DDA algorithm to generate a straight line, a relatively small program
Update : 2008-10-13 Size : 2.96kb Publisher : mengstarry
8b10b_encdec
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Written in VHDL coding 8B10B decoder realize, in the Xilinx platform validated.
Update : 2008-10-13 Size : 69.36kb Publisher : 张开文
traffic
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Verilog realize the use of traffic lights to control Quartus II simulation platform
Update : 2008-10-13 Size : 141.95kb Publisher : 许东滨
3des_vhdl
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3 re-DES (3DES) encryption algorithm and the Q
Update : 2008-10-13 Size : 136.9kb Publisher : 张开文
PID
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Realize the PID control Simulation shows
Update : 2008-10-13 Size : 35.31kb Publisher : 梁利诚
BasicRSA
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RSA encryption algorithm of VHDL realize, through actual FPGA verification.
Update : 2008-10-13 Size : 9.28kb Publisher : 张开文
mapxzhongyao
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The development of good instructions on MapX novice has a lot of help, practical, high
Update : 2008-10-13 Size : 15.05kb Publisher : awen
MAJORITY_VOTER
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Verylog prepared Quartus II platform attached to a simple design example simulation waveforms
Update : 2008-10-13 Size : 73.63kb Publisher : 许东滨
LEDWALK
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Verylog prepared Quartus II platform attached to a simple design example simulation waveforms
Update : 2008-10-13 Size : 84.17kb Publisher : 许东滨
LEDWATER
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Water lights Verylog prepared Quartus II platform attached to a simple design example simulation waveforms
Update : 2008-10-13 Size : 91.94kb Publisher : 许东滨
PLL
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PLL clock module Quartus II platform attached to a simple design example simulation waveforms
Update : 2008-10-13 Size : 788.28kb Publisher : 许东滨
dianji
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Very good article on the motor control, in the campus downloaded for reference and learning
Update : 2008-10-13 Size : 951.13kb Publisher : 付惠珍
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