Search - 74LS00

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[Other resource] 74LS00 DL : 0: 简单的芯片资料,可能大家用得上啊,简单了,就是简单-simple chip information, and we may need them ah, simple, it is simple
Date : 2008-10-13 Size : 92.15kb User : 邓春秋
[Other resource] Z1602 DL : 0: KS0070(44780) 16x2 字符液晶屏驱动演示程序总线方式。连接线图: DB0--P0.0 DB4--P0.4 RW--P2.0 DB1--P0.1 DB5--P0.5 RC--P2.1 DB2--P0.2 DB6--P0.6 E--P2.7 =>74ls00+wr+rd DB3--P0.3 DB7--P0.7 VLCD接1K2电阻到GND [注]:AT89C51的晶振频率为12MHz-KS0070 (44,780) 16x2 character LCD driver means Bus Demonstration Program. Link map : DB0 -- P0.0 DB4 -- P0.4 RW -- P2.0 DB1 -- P0.1 structural constraint exerted -- P0.5 RC -- P2.1 DB2 -- P0.2 2200 -- Encl E -- P2.7 =
Date : 2008-10-13 Size : 1.78kb User : wfl
[Other] Module=99ReversibilityCounter DL : 1: 设计功能及要求设计M=99的十进制加/减可逆计数器（1）接通电源时电路能自启动；（2）手动分别实现加、减计数和自动实现加减可逆计数；（3）用数码管显示计数数值。 (4）给定元件：74LS192、74LS00、74LS76、74LS48及LED。
Date : 2008-10-13 Size : 313.24kb User : 梁志明
[Documents] 74ls00.pdf DL : 0: 74ls00芯片介绍
Date : 2009-06-01 Size : 83.21kb User : pigdogmy@163.com
[Other Embeded program] 74LS00 DL : 0: 简单的芯片资料,可能大家用得上啊,简单了,就是简单-simple chip information, and we may need them ah, simple, it is simple
Date : 2025-07-11 Size : 92kb User : 邓春秋
[SCM] Z1602 DL : 0: KS0070(44780) 16x2 字符液晶屏驱动演示程序总线方式。连接线图: DB0--P0.0 DB4--P0.4 RW--P2.0 DB1--P0.1 DB5--P0.5 RC--P2.1 DB2--P0.2 DB6--P0.6 E--P2.7 =>74ls00+wr+rd DB3--P0.3 DB7--P0.7 VLCD接1K2电阻到GND [注]:AT89C51的晶振频率为12MHz-KS0070 (44,780) 16x2 character LCD driver means Bus Demonstration Program. Link map : DB0-- P0.0 DB4-- P0.4 RW-- P2.0 DB1-- P0.1 structural constraint exerted-- P0.5 RC-- P2.1 DB2-- P0.2 2200-- Encl E-- P2.7 =
Date : 2025-07-11 Size : 1kb User : wfl
[Other] Module=99ReversibilityCounter DL : 0: 设计功能及要求设计M=99的十进制加/减可逆计数器（1）接通电源时电路能自启动；（2）手动分别实现加、减计数和自动实现加减可逆计数；（3）用数码管显示计数数值。 (4）给定元件：74LS192、74LS00、74LS76、74LS48及LED。-Design features and requirements of the design of the metric M = 99 plus/minus CNTR (1) when connected to power supply circuits can be self-starting (2), respectively, to achieve added manually, by counting and automatic counting realize reversible addition and subtraction (3) digital tube display numerical count. (4) of a given component: 74LS192, 74LS00, 74LS76, 74LS48 and LED.
Date : 2025-07-11 Size : 313kb User :
[ActiveX/DCOM/ATL] 74ls DL : 0: June 1989 54LS00/DM 74LS00 Quad 2-Input NAND Gates General Description This device contains four independent gates each of which performs the logic NAND function. Features Y Alternate Military/Aerospace device (54LS00) is avail- able. Contact a National Semiconductor Sales Office/ Distributor for specifications.
Date : 2025-07-11 Size : 8.52mb User : 123wj
[Other] 74LS00 DL : 0: 74ls00资料，内有详細的说明，是做电路时很好的参考。74ls00 datasheet-74ls00 information, which is described in detail, is to do a good reference circuit. 74ls00 datasheet
Date : 2025-07-11 Size : 94kb User : cuiwenhua
[SCM] xinpianjianceyi DL : 0: 自己写的单片机程序，基于C51，可检测74ls00,74ls47,74ls390,74ls151,74ls194芯片，程序较为简单，给大家分享。-Microcontroller to write their own procedures, based on the C51, can detect 74ls00, 74ls47, 74ls390, 74ls151, 74ls194 chips, a relatively simple procedure, to share with you all.
Date : 2025-07-11 Size : 65kb User : 辰宸晨
[SCM] 1602 DL : 0: 1602总线方式显示一串字符，地址定义 RS----P2.0 RW----P2.1 E----P2.7 >74ls00+wr+rd -LCD1602
Date : 2025-07-11 Size : 1kb User : nukes
[Other Embeded program] 111 DL : 0: 一种芯片检测仪，当芯片插入时，能检测芯片的好坏，是哪个脚出问题了。目前只做了74ls00，04，和161三块芯片。该仪器还在进一步完善当中-A chip detector, when the chip is inserted, the chip can detect good and bad, which foot a problem. Currently only the 74ls00, 04, and 161 three chips. The instrument is also to further improve them
Date : 2025-07-11 Size : 82kb User : 庞伟
[SCM] pinlvchengxu DL : 0: ATMEGA8单片机频率计程序。原理上采用32.768K外部晶振产生异步时钟信号，作为M8定时器2de时钟源，设定1024de预分频，可以得到TCNT2溢出de精确时间为1s，在溢出中断时控制74ls00与非门进而控制被测信号de通断，累计1s 内计数器获得de值，经过简单de运算则可获得被测信号de频率-ATMEGA8 MCU frequency meter program. Principle produced by 32.768K asynchronous external crystal clock signal, as the M8 2de clock timer, set 1024de prescaler, can get accurate time TCNT2 overflow de 1s, in the overflow interrupt control 74ls00 then control the NAND gate measured signal de-off, the cumulative gain de 1s in the counter value is obtained after a simple de op de frequency of the signal
Date : 2025-07-11 Size : 3kb User : 小莫
[Other] capacimetro DL : 0: capacimeter digital using 74ls00 74ls90 74ls45 74ls47 design by Hugo Mendez-capacimeter digital using 74ls00 74ls90 74ls45 74ls47 design by Hugo Mendez
Date : 2025-07-11 Size : 42kb User : Mario Marcos
[Other] 74LS00 DL : 0: 74LS Digital circuit chip is introduced，A combination of logic circuit-74LS Digital circuit chip is introduced，A combination of logic circuit
Date : 2025-07-11 Size : 93kb User : 李广龙
[Other] microclock--xinian-introduction DL : 0: 数字秒表中用到的芯片的说明书,及用protel绘制的电路图-HOW TO USING THE PIN OF MICROCLOCK ,FOR EXAMPLE 74LS90,555,74LS00 AND SO ON
Date : 2025-07-11 Size : 959kb User : guoyanping
[Software Engineering] IC-74lS00- DL : 0: 飞洒发生阿宝仿盛大很大声的撒带上吧，标点符号汇金风-This datasheet has been download from: www.datasheetcatalog.com Datasheets for electronics components.
Date : 2025-07-11 Size : 784kb User : 胡大傻
[Other] 74LS DL : 0: 74LS series data sheets
Date : 2025-07-11 Size : 1.81mb User : nocknock
[Report papers] TTL集成逻辑门的逻辑功能与参数测试 DL : 0: TTL集成逻辑门的逻辑功能与参数测试 1．掌握TTL集成电路的外形、引脚、使用方法； 2．掌握集成门电路的使用及逻辑电平的测量； 3．熟悉使用仿真软件测试门电路的参数和功能。二、实验器材 1．数字电路实验箱 2．双踪示波器 3．万用表 4．直流毫安表 5．74LS20×2、1K、10K电位器、200Ω电阻器(0.5W)、74LS00、74LS10、74LS04、74LS86。三、实验内容 1．验证TTL集成与非门74LS20、74LS00、74LS04、74LS10、74LS86的逻辑功能. 以74LS20为例，按图接线，门的四个输入端接逻辑开关输出插口，以提供“0”与“1”电平信号，开关向上，输出逻辑“1”，向下为逻辑“0”。门的输出端接由LED发光二极管组成的逻辑电平显示器的显示插口，LED亮为逻辑“1”，不亮为逻辑“0”。按表3-1-1的真值表逐个测试集成块中两个与非门的逻辑功能。74LS20有4个输入端，有16个最小项，在实际测试时，只要通过对输入1111、0111、1011、1101、0000五项进行检测就可判断其逻辑功能是否正常。
Date : 2020-12-25 Size : 331.43kb User : AlipayLogin_2088722255046014