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Description: 自制完全成功!!!!ADC0809时钟直接使用AT89C51的ALE信号2MHz P1口段码,P2.0-3位码(P2.0为最右边数码管的位码)
P0口数据输入 通道0输入,ADC0809中ST和ALE---P3.0,EOC---P3.2,CLK---ALE.OE---P3.1*/-made entirely successful! ! Connection between ADC 0809 clock direct access to the ALE signal AT89C51 2MHz P1 mouth of the code, P2.0-3-bit code (P2.0 most of the right side of the digital-code) P0 export data input channel 0 input, Connection between ADC 0809 ST and China --- P3.0 ALE, the EOC --- P3.2. CLK --- --- ALE.OE P3.1 * /
Platform: |
Size: 3207 |
Author: gkimkhnyvc |
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Description: TLV1544与TMS320VC5402通过串行口连接，此时，A／D转换芯片作为从设备，DSP提供帧同步和输入／输出时钟信号。TLV1544与DSP之间数据交换的时序图如图3所示。
开始时， 为高电平（芯片处于非激活状态），DATA IN和I/OCLK无效，DATAOUT处于高阻状态。当串行接口使CS变低（激活），芯片开始工作，I／OCLK和DATAIN能使DATA OUT不再处于高阻状态。DSP通过I／OCLK引脚提供输入／输出时钟8序列，当由DSP提供的帧同步脉冲到来后，芯片从DATA IN接收4 b通道选择地址，同时从DATAOUT送出的前一次转换的结果，由DSP串行接收。I／OCLK接收DSP送出的输入序列长度为10～16个时钟周期。前4个有效时钟周期，将从DATAIN输入的4 b输入数据装载到输入数据寄存器，选择所需的模拟通道。接下来的6个时钟周期提供模拟输入采样的控制时间。模拟输入的采样在前10个I／O时钟序列后停止。第10个时钟沿（确切的I／O时钟边缘，即上升沿或下降沿，取决于操作的模式选择）将EOC变低，转换开始。
-TLV1544 with TMS320VC5402 through serial port connectivity, at this time, A / D conversion chip as from the equipment, to provide frame synchronization DSP and input / output clock signal. TLV1544 DSP and data exchange between the chronology of the map is shown in figure 3. At the beginning of the margin (in chip-activated), and I DATA IN / OCLK invalid, DATAOUT at high resistance state. When the serial interface CS change low (activator), the chip start work, I / OCLK and DATAIN can DATA OUT is no longer in a state of high resistance. DSP through I / OCLK pin provide input / output clock 8 sequence, When the DSP from the frame synchronization pulse, the chip from the DATA IN receive four channels to choose b address, DATAOUT sent from the same time the previous conversion results from the
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Size: 1207 |
Author: john |
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Description: 有关广电双向网改造EPON+E0C中，EOC部分的内容简介。
Platform: |
Size: 186268 |
Author: 周阳 |
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Description: 采用Intel8255端口数据线与上图除IN0~IN7之外的引线连接。
程序步骤：
(1)根据模拟信号输入连线方式(跳线JP10与电位器１相连，若JP10上跳线摘掉，可将电位器２作模拟信号输入)，选择模拟通路，即选定addC,addB,accA组成三位二进制数据；
(2)同时使START和ALE有效，使ADC0809选择相应模拟信号并转换；
(3)等待EOC出现高电平；
(4)使OE为高电平，即允许从ADC0809读出数据
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Size: 1115 |
Author: 萧寒 |
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Description: MOCA方案介绍，moca为当前使用比较多的EOC解决方案，供大家参考！
Platform: |
Size: 3510653 |
Author: 王军 |
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Description: 一个简单的snmp的mib及其c程序-A silmple SNMP mib and its c language source code
Platform: |
Size: 3072 |
Author: 王狄天 |
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Description: 自制完全成功!!!!ADC0809时钟直接使用AT89C51的ALE信号2MHz P1口段码,P2.0-3位码(P2.0为最右边数码管的位码)
P0口数据输入 通道0输入,ADC0809中ST和ALE---P3.0,EOC---P3.2,CLK---ALE.OE---P3.1*/-made entirely successful! ! Connection between ADC 0809 clock direct access to the ALE signal AT89C51 2MHz P1 mouth of the code, P2.0-3-bit code (P2.0 most of the right side of the digital-code) P0 export data input channel 0 input, Connection between ADC 0809 ST and China--- P3.0 ALE, the EOC--- P3.2. CLK------ ALE.OE P3.1* /
Platform: |
Size: 3072 |
Author: gkimkhnyvc |
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Description: TLV1544与TMS320VC5402通过串行口连接，此时，A／D转换芯片作为从设备，DSP提供帧同步和输入／输出时钟信号。TLV1544与DSP之间数据交换的时序图如图3所示。
开始时， 为高电平（芯片处于非激活状态），DATA IN和I/OCLK无效，DATAOUT处于高阻状态。当串行接口使CS变低（激活），芯片开始工作，I／OCLK和DATAIN能使DATA OUT不再处于高阻状态。DSP通过I／OCLK引脚提供输入／输出时钟8序列，当由DSP提供的帧同步脉冲到来后，芯片从DATA IN接收4 b通道选择地址，同时从DATAOUT送出的前一次转换的结果，由DSP串行接收。I／OCLK接收DSP送出的输入序列长度为10～16个时钟周期。前4个有效时钟周期，将从DATAIN输入的4 b输入数据装载到输入数据寄存器，选择所需的模拟通道。接下来的6个时钟周期提供模拟输入采样的控制时间。模拟输入的采样在前10个I／O时钟序列后停止。第10个时钟沿（确切的I／O时钟边缘，即上升沿或下降沿，取决于操作的模式选择）将EOC变低，转换开始。
-TLV1544 with TMS320VC5402 through serial port connectivity, at this time, A/D conversion chip as from the equipment, to provide frame synchronization DSP and input/output clock signal. TLV1544 DSP and data exchange between the chronology of the map is shown in figure 3. At the beginning of the margin (in chip-activated), and I DATA IN/OCLK invalid, DATAOUT at high resistance state. When the serial interface CS change low (activator), the chip start work, I/OCLK and DATAIN can DATA OUT is no longer in a state of high resistance. DSP through I/OCLK pin provide input/output clock 8 sequence, When the DSP from the frame synchronization pulse, the chip from the DATA IN receive four channels to choose b address, DATAOUT sent from the same time the previous conversion results from the
Platform: |
Size: 1024 |
Author: |
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Description: 有关广电双向网改造EPON+E0C中，EOC部分的内容简介。-Two-way network on the transformation of Radio, Film and Television EPON+ E0C in, EOC part of the profile.
Platform: |
Size: 186368 |
Author: 周阳 |
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Description: 采用Intel8255端口数据线与上图除IN0~IN7之外的引线连接。
程序步骤：
(1)根据模拟信号输入连线方式(跳线JP10与电位器１相连，若JP10上跳线摘掉，可将电位器２作模拟信号输入)，选择模拟通路，即选定addC,addB,accA组成三位二进制数据；
(2)同时使START和ALE有效，使ADC0809选择相应模拟信号并转换；
(3)等待EOC出现高电平；
(4)使OE为高电平，即允许从ADC0809读出数据
-Intel8255 port using data cable with the exception of the map outside the IN0 ~ IN7 pin connection. Procedural steps: (1) According to the analog signal input connection means (JP10 jumper connected with the potentiometer 1, if the jumper JP10 removed can be Potentiometers for analog signal input 2), select the analog channel, namely, the election set addC, addB, accA composed of three binary data (2) At the same time so that START and ALE effective, so select the appropriate ADC0809 analog signal and conversion (3) wait for EOC appears high (4) to enable the OE for the high electrical ping, which allows读出数据from ADC0809
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Size: 1024 |
Author: 萧寒 |
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Description: MOCA方案介绍，moca为当前使用比较多的EOC解决方案，供大家参考！-MOCA program introduction, moca for the current use of a relatively large number of EOC solution, for your reference!
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Size: 3510272 |
Author: 王军 |
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Description: 基带无源EOC的应用说明，是利用了有线电视信号使用54～860MHz高端频率，以太网的基带数据信号使用0～42MHz的低端频率，故两者可以在同一根电缆中传输，结合RF有线电视技术与数据以太网数据传输技术，把以太网的数据基带信号通过合路器馈送到原电视网的分配电缆上，与电视信号一起送至用户。在用户端，通过分离器将电视信号与数据信号分离开来，分别送入各自的终端设备，如电视信号送入电视机，数据信号送入计算机，实现了电视和数据信号在原电视网入户电缆上的合路、传输、分配、分离。-err
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Size: 8192 |
Author: wxx |
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Description: 中断方式的A/D采集系统使用ADC0809的通道0，接入0-5V的直流电压，用W1调整模拟电压值，A/D的转换结束信号EOC接在8259A的IRQ3上，采集100个数据并存入内存中，同时将采集的16进制数据显示在数码管上。请多次调整0-5V的电压值（旋动W1旋钮），进行A/D采集，并观测内存中的数据的变化情况。-Interrupt the A/D acquisition system using ADC0809 channel 0, access to 0-5V DC voltage, using W1 to adjust the analog voltage value, A/D conversion end signal EOC then the IRQ3 in 8259A, the 100 data collection co-exist into memory, at the same time, 16-band data collected in the digital tube display. Requested several times to adjust 0-5V voltage value (rotary knob moving W1) for A/D collection, and observation data in memory changes.
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Size: 1024 |
Author: alia |
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Description: using adc with interrupt on EOC
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Size: 1670144 |
Author: Giorgio |
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Description: ATMEL 9200 芯片与ＤＳ１３０７之间的通讯，平可通过调试串口看结果-ATMEL 9200 chip and the communication between the DS1307, the EOC can see the results of serial testing
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Size: 537600 |
Author: 阿西 |
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Description: （1）． 进行A/D转换时，采用查询EOC的标志信号来检测A/D转换是否完毕，若完毕则把数据通过P0端口读入，经过数据处理之后在数码管上显示。-For A/D conversion using query EOC signal to detect signs of the A/D conversion is completed, if completed through the P0 port while the data read through data processing in the digital control after the show.
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Size: 22528 |
Author: sanmu |
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Description: //*** *** *** *** *** *** *** *** *** *** *** *** ***
// MSP430x41x2 Demo - ADC10, Sample A0, Signed, Set P5.1 if A0 > 0.5*AVcc
//
// Description: A single sample is made on A0 with SIGNED reference to AVcc.
// Software sets ADC10SC to start sample and conversion - ADC10SC
// automatically cleared at EOC. ADC10 internal oscillator times sample (16x)
// and conversion. In Mainloop MSP430 waits in LPM0 to save power until ADC10
// conversion complete, ADC10_ISR will force exit from LPM0 in Mainloop on-//******************************************************************************
// MSP430x41x2 Demo- ADC10, Sample A0, Signed, Set P5.1 if A0 > 0.5*AVcc
//
// Description: A single sample is made on A0 with SIGNED reference to AVcc.
// Software sets ADC10SC to start sample and conversion- ADC10SC
// automatically cleared at EOC. ADC10 internal oscillator times sample (16x)
// and conversion. In Mainloop MSP430 waits in LPM0 to save power until ADC10
// conversion complete, ADC10_ISR will force exit from LPM0 in Mainloop on
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Size: 4096 |
Author: hfl |
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Description: ADC EQU 35H
CLOCK BIT P2.4 定义ADC0808时钟位
ST BIT P2.5
EOC BIT P2.6
OE BIT P2.7
PWM BIT P3.7
ORG 00H
SJMP START
ORG 0BH
LJMP INT_T0
START: MOV TMOD,#02H
MOV TH0,#20
MOV TL0,#00H
MOV IE,#82H
SETB TR0
WAIT: CLR ST
SETB ST
CLR ST 启动AD转换
JNB EOC,$ 等待转换结束
SETB OE
MOV ADC,P1 读取AD转换结果
CLR OE
SETB PWM PWM输出
MOV A,ADC
LCALL DELAY
CLR PWM
MOV A,#255
SUBB A,ADC
LCALL DELAY
SJMP WAIT
INT_T0: CPL CLOCK 提供ADC0808时钟信号
RETI
DELAY: MOV R6,#1
D1: DJNZ R6,D1
DJNZ ACC,D1
RET
END-fgfdsg
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Size: 48128 |
Author: PXH |
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Description: DOCSIS EoC for EPON技术白皮书_Broadcom-DOCSIS EoC for EPON
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Size: 1990656 |
Author: 三石 |
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Description: eoc(基于同轴的以太网)基本原理及应用介绍,很详细哦!-eoc introduction and it applications
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Size: 1230848 |
Author: 松 |
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