Description: This a CY7C68013 (USB2.0 Chip) Configuration example for Slave FIFO Mode with Sync Signal. Platform: |
Size: 122340 |
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Description: This an USB2.0 chip CY7C68013 Configuraion Example for Slave FIFO mode with \"async\" mode. Platform: |
Size: 124594 |
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Description: USB2.0开发板完整电路图,protel99se格式,主芯片采用CY7C68013-128S。-USB2.0 development board complete circuit, protel99se format, the main chip CY7C68013-128S. Platform: |
Size: 23552 |
Author:song |
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