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Description: 三篇关于Viterbi FPGA编译码器的优化设计文档：
1、Viterbi译码器的FPGA设计实现与优化.pdf
2、Viterbi译码器的低功耗设计.pdf
3、基于FPGA的高速并行Viterbi译码器的设计与实现.pdf-3 on the Viterbi FPGA optimization codecs design documents: 1, Viterbi decoder FPGA Design Implementation and Optimization. Pdf2, Viterbi decoder, low-power design. Pdf3, high-speed FPGA-based parallel Viterbi decoder Design and Implementation. pdf
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Size: 451584 |
Author: helei_zju |
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Description: 一篇关于Viterbi译码器在FPGA上的实现的很好的论文，特别值得推荐。-A Viterbi decoder in the FPGA on the realization of the good on paper, in particular, is recommended.
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Size: 897024 |
Author: jenny |
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Description: 编码方式为213的Viterbi卷积码编码器和译码器的FPGA的实现，包含整个QuartusＩＩ的工程文件，解码方式为寄存器交换法-Encoding for the 213 convolutional code encoder and Viterbi decoder FPGA realization of the project file that contains the entire QuartusII, decoding method for the register exchange
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Size: 2668544 |
Author: jenny |
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Description: LTE system,
OFDM modulation and Turbo
Coding, including Viterbi, BCJR
and SOVA are extensively analysed,
ending up with a system performance
specification. These are
used to implement a fixed length
Turbo encoder, a 16-QAM modulator
and a 16 point IFFT on an
FPGA using MATLAB Simulink⃝ R
with Xilinx⃝ R System Generator plugin.
A MATLAB⃝ R script is developed
to test the Simulink implementation.
In addition, an iterative
Turbo decoder is programmed using
MATLAB⃝ R .
Platform: |
Size: 11264 |
Author: mezo |
Hits:
Description: LTE system,
OFDM modulation and Turbo
Coding, including Viterbi, BCJR
and SOVA are extensively analysed,
ending up with a system performance
specification. These are
used to implement a fixed length
Turbo encoder, a 16-QAM modulator
and a 16 point IFFT on an
FPGA using MATLAB Simulink⃝ R
with Xilinx⃝ R System Generator plugin.
A MATLAB⃝ R script is developed
to test the Simulink implementation.
In addition, an iterative
Turbo decoder is programmed using
MATLAB⃝ R .
Platform: |
Size: 11264 |
Author: mezo |
Hits:
Description: Throughout the project the LTE system,
OFDM modulation and Turbo
Coding, including Viterbi, BCJR
and SOVA are extensively analysed,
ending up with a system performance
specification. These are
used to implement a fixed length
Turbo encoder, a 16-QAM modulator
and a 16 point IFFT on an
FPGA using MATLAB Simulink R ⃝
with Xilinx R ⃝ System Generator plugin.
A MATLAB R ⃝ script is developed
to test the Simulink implementation.
In addition, an iterative
Turbo decoder is programmed using
MATLAB R ⃝ .-Throughout the project the LTE system,
OFDM modulation and Turbo
Coding, including Viterbi, BCJR
and SOVA are extensively analysed,
ending up with a system performance
specification. These are
used to implement a fixed length
Turbo encoder, a 16-QAM modulator
and a 16 point IFFT on an
FPGA using MATLAB Simulink R ⃝
with Xilinx R ⃝ System Generator plugin.
A MATLAB R ⃝ script is developed
to test the Simulink implementation.
In addition, an iterative
Turbo decoder is programmed using
MATLAB R ⃝ .
Platform: |
Size: 2099200 |
Author: mezo |
Hits: