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[Otheridems100

Description: IDE bus master的技术文档 Bus master通过DMA将数据从ATA设备传输到内存中
Platform: | Size: 51539 | Author: 小小 | Hits:

[OtherS3C44B0X中文技术文档

Description:

 

   
三星的S3C44B0X 16/32位RISC处理器被设计来为手持设备等提供一个低成本高性能的方案。
S3C44B0X提供以下配置:2.5V ARM7TDMI 内核带有8Kcache ;可选的internal SRAM;LCD Controller(最大支持256色STN,使用LCD专用DMA);2-ch UART with handshake(IrDA1.0, 16-byte FIFO) / 1-ch SIO 2-ch general DMAs / 2-ch peripheral DMAs with external request pins External memory controller (chip select logic, FP/ EDO/SDRAM controller) 5-ch PWM timers & 1-ch internal timerWatch Dog Timer71 general purpose I/O ports / 8-ch external interrupt source RTC with calendar function 8-ch 10-bit ADC 1-ch multi-master IIC-BUS controller 1-ch IIS-BUS controller Sync. SIO interface and On-chip clock generator with PLL.
S3C44B0X采用一种新的三星ARM CPU嵌入总线结构-SAMBA2,最大达66MHZ。

Platform: | Size: 78690 | Author: ssunshine | Hits:

[Otheridems100

Description: IDE bus master的技术文档 Bus master通过DMA将数据从ATA设备传输到内存中-IDE bus master of the technical documentation by Bus master DMA data from the ATA device to memory
Platform: | Size: 51200 | Author: 小小 | Hits:

[Embeded Linuxpciv

Description: 海思Hi3520 PCI总线演示程序 PCIV 相关样例程序包含以下几部分: 1、PCIV MSG :PCI业务层的消息通讯封装。基于MCC模块提供的ioctl接口,提供消息端口的打开关闭、消息发送、消息接收等接口。 相关代码为pciv_msg.c、pciv_msg.h。 2、PCIV Trans:PCI业务层的数据传输封装。基于PCI DMA传输接口、PCI消息交互及一套基本的读写指针Buffer,实现业务层通用数据传输接口。 可以用于主从片之间的任何类型的数据的传输。相关代码为pciv_trans.c、pciv_trans.h。 3、PCIV Sample:PCI业务层的接口使用样例。基于PCIV的MPI接口和以上两个模块提供的接口。 相关代码为sample_pciv_host.c、sample_pciv_slave.c、sample_pciv_comm.h。 目前演示的业务包括: 1)从片将实时预览图像通过PCI传输到主片并显示 2)从片将编码码流通过PCI传输到主片并存储 3)主片从文件中读取待解码码流,通过PCI传输到从片,从片解码后将图像数据再发送到主片显示。-Hass Hi3520 PCI bus demonstration program PCIV relevant sample program contains the following sections: 1, PCIV MSG: PCI service layer message communication package. MCC module based on the ioctl interface to provide information to open the port closed, consumer Information to send, the message receiver interfaces. Related code pciv_msg.c, pciv_msg.h. 2, PCIV Trans: PCI data transfer package business layer. PCI DMA transfers based interface, PCI message exchange and a set of basic reading and writing pointers Buffer, the business layer to achieve common data transfer interface. Between master and slave chip can be used for any type of data transmission. Related code pciv_trans.c, pciv_trans.h. 3, PCIV Sample: PCI interface to use the business layer sample. Based on PCIV the MPI interface and the interface of these two modules. Related code sample_pciv_host.c, sample_pciv_slave.c, sample_pciv_comm.h. Current presentation of business include: 1) real-time prev
Platform: | Size: 2685952 | Author: sillygenius | Hits:

[MPIXilinx_PCIe_BMD

Description: xilinx FPGA 开发 PCIe BMD DMA的verilog HDL源码-xilinx fpga pcie Gen 1/2 bus master device---PCIe DMA with verilog HDL
Platform: | Size: 59392 | Author: 赵极远 | Hits:

[Software EngineeringALI_M1543(C)_chipset

Description: M1543: Desktop South Bridge The M1543 is a bridge between PCI and ISA bus, providing full PCI and ISA compatible functions. The M1543 has Integrated Super I/O( Floppy Disk Controller, 2 serial ports/1 parallel port ), System Peripherals (ISP) (2 x 82C59 and Serial interrupt, 1 x 82C54), advanced features (Type F and Distributed DMA) in the DMA controller (2 X 82C37), PS2 Keyboard/Mouse controller, 2-channel dedicated IDE Master Controller with Ultra-33 specification, System Management Bus (SMB), and 2 OpenHCI 1.0a USB ports PDF Datasheet-M1543: Desktop South Bridge The M1543 is a bridge between PCI and ISA bus, providing full PCI and ISA compatible functions. The M1543 has Integrated Super I/O( Floppy Disk Controller, 2 serial ports/1 parallel port ), System Peripherals (ISP) (2 x 82C59 and Serial interrupt, 1 x 82C54), advanced features (Type F and Distributed DMA) in the DMA controller (2 X 82C37), PS2 Keyboard/Mouse controller, 2-channel dedicated IDE Master Controller with Ultra-33 specification, System Management Bus (SMB), and 2 OpenHCI 1.0a USB ports PDF Datasheet
Platform: | Size: 1608704 | Author: serge | Hits:

[Software EngineeringALI_M1523(33)

Description: M1533: PCI-to-ISA Bus Bridge The M1533 is a bridge between PCI and ISA bus, providing full PCI and ISA compatible functions. The M1533 has Integrated System Peripherals (ISP) (2 x 82C59 and Serial interrupt, 1 x 82C54), advanced features (Type F and Distributed DMA) in the DMA controller (2 X 82C37), PS2 Keyboard/Mouse controller, 2-channel dedicated IDE Master Controller with Ultra-33 specification, System Management Bus (SMB), and 2 OpenHCI 1.0a USB ports. PDF Datasheet-M1533: PCI-to-ISA Bus Bridge The M1533 is a bridge between PCI and ISA bus, providing full PCI and ISA compatible functions. The M1533 has Integrated System Peripherals (ISP) (2 x 82C59 and Serial interrupt, 1 x 82C54), advanced features (Type F and Distributed DMA) in the DMA controller (2 X 82C37), PS2 Keyboard/Mouse controller, 2-channel dedicated IDE Master Controller with Ultra-33 specification, System Management Bus (SMB), and 2 OpenHCI 1.0a USB ports. PDF Datasheet
Platform: | Size: 1163264 | Author: serge | Hits:

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