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[Embeded-SCM DevelopDDS_VHDL

Description: 一个老外写的用CPLD实现DDS的软件,大家参考参考!-Written by a foreigner with CPLD realize DDS software, your information!
Platform: | Size: 4096 | Author: 夕阳 | Hits:

[Software EngineeringCPLD_zhengxuanbofashengqi

Description: 能完全模拟DDS芯片的工作,在CPLD的输出引脚后接上相应的D/A转换芯片并接上低通滤波器,将得到非常好的正旋波-To fully simulate the work of DDS chip in after the CPLD output pin connected to the corresponding D/A conversion chip and connected to low-pass filter, will be a very good spin wave is
Platform: | Size: 301056 | Author: haha | Hits:

[SCMCode

Description: 设计一个正弦信号发生器,使用凌阳公司的16位单片机SPCE061A作为中央控制器,结合DDS芯片AD9850,产生0~15MHz频率可调的正弦信号,正弦信号频率设定值可断电保存;使用宽频放大技术,在50Ω负载电阻上使1K~10MHz范围内的正弦信号输出电压幅度VP-P=6V±1V;产生载波频率可设定的FM和AM信号;调制信号为1KHz的正弦波,调制信号的产生采用DDS技术,由CPLD和Flash ROM加上DAC进行直接数字合成;二进制基带序列码由CPLD产生,在100KHz固定载波频率下进行数字键控,产生ASK,PSK信号。-Design of a sinusoidal signal generator, the use of Sunplus 16-bit MCU SPCE061A as the central controller, combined with DDS chip AD9850, have adjustable frequencies 0 ~ 15MHz sinusoidal signal, sinusoidal signal frequency settings can be stored power using broadband amplification, in a 50Ω load resistor to 1K ~ 10MHz sinusoidal signal within the output voltage amplitude VP-P = 6V ± 1V generating the carrier frequency of the FM and AM can be set signal 1KHz sine wave modulation signal, modulated signal generation using DDS technology, coupled by the CPLD and Flash ROM DAC for direct digital synthesis binary baseband sequence code generated by the CPLD in a fixed carrier frequency 100KHz digital keying, resulting in ASK, PSK signals.
Platform: | Size: 29696 | Author: 王金 | Hits:

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