Search - design3

Search - design3 - List

[Windows Develop] design3 DL : 1: 对于硬盘利用H无穷，LQR，ＰＩＤ，极点配置进行控制，包括程序和完整分析报告。-For hard drive using H infinity, LQR, PID, pole placement control, including procedures and a complete analysis report.
Update : 2025-02-17 Size : 357kb Publisher : xiaohe
[Other] OPC_Automation DL : 0: This VB project is simple example,supported by RSLinx Gateway Installation, to communication RSlinx OPC with AB PLC.
Update : 2025-02-17 Size : 16kb Publisher : sems
[Software Engineering] design3 DL : 0: YDEUI型交流电压电流变送器方案设计YDEUI AC voltage and current transducer design-YDEUI AC voltage and current transducer design
Update : 2025-02-17 Size : 71kb Publisher : zhou
[Crack Hack] propability-design3 DL : 0: vb 按泊松分布计算的概率机械可靠性设计-vb calculated by the Poisson distribution the probability of mechanical reliability
Update : 2025-02-17 Size : 4kb Publisher : 王一
[assembly language] Assembly-language-program-design3 DL : 0: 汇编语言程序设计的ppt讲义第三章，一共为四个文件打包压缩-Assembly language programming ppt notes, a total of four files packaged compressed
Update : 2025-02-17 Size : 407kb Publisher : xz
[Software Engineering] design3 DL : 1: 示波器的设计，关于毕业论文的设计，做毕业设计所必须资料-Oscilloscope design, design, do graduate design thesis must
Update : 2025-02-17 Size : 4.85mb Publisher : 副市长
[hardware design] vlsi-design3 DL : 0: 电路具有四路4_bit字宽的串行输入总线，四路4_bit字宽的输出总线信号的电路。电路完成将串行输入信号A[3..0]、B[3..0]、C[3..0]、D[3..0]（大小排列无序）以数值大小排序输出的功能，输出X3[3..0]、X2[3..0]、X1[3..0]、X0[3..0]中X3最大，X0最小。输入数据是无符号整数。 -Circuit with four 4_bit word wide serial input bus, four 4_bit word wide output bus signal circuit. Complete the circuit serial input signal A[3..0], B[3..0], C[3..0], D[3..0] (the size of order disorder) to the numerical size of the sort output function, X3[3..0], X2[3..0], X1[3..0] output, X0[3..0] X3 maximum, minimum X0. The input data is an unsigned integer.
Update : 2025-02-17 Size : 180kb Publisher : james stag