Description: 数码6位数码管时钟程序2222
6 位数码管多功能时钟程序
74HC164驱动LED 显示
74hc138进行位选
Creat By: 单片东东
2004.12.28 bian xie-six digital clock control procedures 2222 6-bits digital clock control procedures 74HC164 multifunctional LED Display Driver 74hc138 for Creat By Choice : Single Eastern 2004.12.28 MacromediaNokia xie xie Platform: |
Size: 2048 |
Author:随风 |
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Description: 数字逻辑课程设计，基于EWB软件设计一个数字电子时钟，要求能实现十二进制和二十四禁止的转换，有秒时分的显示，用74160实现的-Digital logic design, EWB-based software to design a digital electronic clock, the requirements to achieve 10 and 24 the prohibition of binary conversion, the second night of the show, with 74,160 to achieve the Platform: |
Size: 87040 |
Author:xxj |
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Description: 设计一个定时显示装置，用实验仪左侧的六个LED数码管显示时间，时间显示格式为24小时制。分秒值为59分55秒时开始报时，每秒钟蜂鸣器鸣叫一声，到整点报时停止。
74系列模块；8254模块；8259模块；8255模块。
在PD32实验模块中验证正确
8254每25ms刷新依次
Q_0、Q_1、Q_2、Q_3分别与Q0、Q1、Q2、Q3相连
P_0、P_1、P_2分别与P0、P1、P2相连
74： CS1接340H，CS2接360H
GATE0接+5V，CLOCK0接1.5MHZ,OUT0接IR0,GATE1接8255第四片B0，CLOCK1接93KHZ,OUT1接蜂鸣器，CS接300H,A0接地址线A2，A1接地址线A3
8259CS1接3A0H,INT1接INTR,INT-A接INTA,SP/1接+5V
8255CS4接CS-4-Shows the design of a timing device, the experimental instrument with the left side of the six LED digital time display, time display format for the 24-hour clock. Accurate value of 59 minutes and 55 seconds at the beginning of time, calls out every second buzzer to stop the whole point of time. 74 series module 8254 module 8259 module 8255 module. PD32 experimental module in the right to verify each and every 25ms refresh 8254 followed Q_0, Q_1, Q_2, Q_3 with Q0, Q1, Q2, Q3 connected to P_0, P_1, P_2, respectively, and P0, P1, P2 connected 74: CS1 access 340H, CS2 Access 360H GATE0 then+5 V, CLOCK0 then 1.5MHZ, OUT0 then IR0, GATE1 the fourth film 8255 then B0, CLOCK1 then 93KHZ, OUT1 access buzzer, CS next 300H, A0 then address line A2, A1 then take the address line A3 8259CS1 3A0H, INT1 then INTR, INT-A Access INTA, SP/1 then+5 V 8255CS4 then CS-4 Platform: |
Size: 2048 |
Author:康凯 |
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Description: 设计一个采用数字电路实现,对时,分,秒.数字显示的计时装置,周期为24小时，显示满刻度为23时59分59秒，并具有校时功能和报时功能的数字电子钟。电路主要采用中规模集成电路.本系统的设计电路由脉冲逻辑电路模块、时钟脉冲模块、时钟译码显示电路模块、整电报时模块、校时模块等部分组成。采用电池作电源，采用低功耗的芯片及液晶显示器，发生器使用石英晶振、计数振荡器CD4060及双D触发器74LS74，计数器采用同步双十进制计数器74LS160，锁存译码器是74LS248，整电报时电路用74LS74，74LS32及扬声器构成。-Design a digital circuit, on the hours, minutes, seconds. Figures show that the timing device, 24-hour period, indicating full scale is 23:59:59 and the time with school functions and timekeeping functions of digital electronic clock. Scale integrated circuits used in the main circuit. The design of this system by the pulse logic circuit module, clock module, the clock display circuit decoding module, when the entire cable module, the campus module components. Using a battery powered, low-power chips and liquid crystal display generator using a quartz crystal oscillator, count of CD4060 oscillator and two D flip-flop 74LS74, two-decimal counter synchronous counter 74LS160, latch decoder is the 74LS248, the whole When telegraph circuits 74LS74, 74LS32 and loudspeaker Platform: |
Size: 449536 |
Author:张龙 |
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Description: 使用P1.0，P1.1作为74164串行输入数据线和时钟线，74164的输出接数码管的段码，P1.2接一位数码管的位选码，在一位数码管上轮流显示数字0~F。-Use P1.0, P1.1 as 74,164 serial input data and clock lines, 74,164 digital output segment access code, P1.2 bit then choose a digital code, in turn displayed on a digital Digital 0 ~ F.
Platform: |
Size: 1024 |
Author:zhangqi |
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Description: 利用两片74160制成的24/12进制计数器，可以作为数字钟的一部分-Made use of two 74 160 24/12 binary counter, digital clock can be used as part of Platform: |
Size: 316416 |
Author:郑浩 |
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Description: 在protues7.0下采用74190设计的一个数字钟，有报时功能！仅供交流参考！-Used under 74,190 in protues7.0 design of a digital clock with chime! Only exchange information! Platform: |
Size: 26624 |
Author:Xinxu |
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