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[OS Developos_changeable_partition

Description: 采用可变分区存储管理并且 采用首次适应算法实现存储器分配与回收-using variable memory management and FFA agrithment implement the memory allocate and reclaim.
Platform: | Size: 1183 | Author: 杨学思 | Hits:

[CA authMPPE_Encryption

Description: MPPE加密算法实现。适用 于不同的平台系统。-FFA encryption algorithm. Applicable to a different system platform.
Platform: | Size: 5918 | Author: flyhorse | Hits:

[OS Developos_changeable_partition

Description: 采用可变分区存储管理并且 采用首次适应算法实现存储器分配与回收-using variable memory management and FFA agrithment implement the memory allocate and reclaim.
Platform: | Size: 1024 | Author: 杨学思 | Hits:

[CA authMPPE_Encryption

Description: MPPE加密算法实现。适用 于不同的平台系统。-FFA encryption algorithm. Applicable to a different system platform.
Platform: | Size: 6144 | Author: flyhorse | Hits:

[OtherFFA

Description: FFA(快速折叠算法),实现噪声中的周期信号检测,及周期估算-FFA (fast folding algorithm), the realization of the periodic signal in noise detection, and cycle estimates
Platform: | Size: 1024 | Author: 程乙钊 | Hits:

[Software Engineeringvector-control

Description: 当前,矢量控制是一种优越的交流电机控制方式,它模拟直流电机的控制方式使得交流电机也能取得与直流电机相媲美的控制 效果。依据矢量控制的基本原理和方法,用 456752 8 9:4 7:<= 模块构建了一个基于转子磁场定向的旋转坐标系下的交流异步 电机矢量控制系统仿真模型,对其速度控制器提出并设计一种模糊滑模变结构控制算法。该控制算法具备模糊逻辑控制和滑模 变结构控制两者优点,并且较好地解决了滑动模态的抖动问题。仿真结果表明了该设计的可行性以及具有良好的动静态性能、 较强的鲁棒性-6.C+D& EFB@.A B.*@A.G ! H’ , )?+ ?1IFA).A B.*@A.G J.CF .K )*C1B@).* J.@.AL :@ B+* .>@+)* @(F ?+JF B.*@A.G FKKFB@ .K M’ J.@.A >D J.CFG)*/ @(F B.*@A.G J.CF .K M’ J.@.AL 5BB.AC)*/ @. EFB@.A B.*@A.G N ? IA)*B)IGF+*C JF@(.C& 456752 8 9:4 7:<= J.C1GF O+? 1?FC @. >1)GC+ ?)J1P G+@).* J.CFG .K 5’ J.@.A EFB@.A B.*@A.G ?D?@FJ >+?FC .* @(F A.@.A KG1Q .A)F*@FC B..AC)*+@F )* @()? I+IFAL R1SSD ?G)C)*/ E+A)+>GF ?@A1B@1AF B.*@A.G O+? IA.I.?FC+*C FJIG.DFC )* ?IFFC B.*@A.GGFAL 6(F B.*@A.GGFA I.??F??FC @(F JFA)@? .K K1SSD G./)B B.*@A.G+*C ?G)C)*/ J.CF E+A)+>GF ?@A1B@1AF B.*@A.G , +*C )@ B+* ?.GEF @(F IA.>GFJ .K @(F B(+@@FA)*/ .K ?G)C)*/ J.CFL 6(F AF?1G@? .K ?)J1G+@).* )*C)B+@F @(+@ @(F B.*@A.GGFA O+? O.AT+>GF O)@( /..C A.>1?@*F??+*C /..C CD*+J)B+*C ?@+@)B IFAK.AJ+*BF F?IFB)+GGD )* @(F K)FGC .K F*/)*FFA)*/
Platform: | Size: 380928 | Author: teamm | Hits:

[matlabffa

Description: firefly algorithm based on swarm intelligence works very well in optimizing all types of problems
Platform: | Size: 1024 | Author: pk | Hits:

[Otherffa

Description: 因子分析法的心电信号降噪,详细的写了E步和M步(Factor analysis of ECG noise reduction, detailed written E and M steps)
Platform: | Size: 1024 | Author: 娜娜0711 | Hits:

[Mathimatics-Numerical algorithmsFA_2

Description: 萤火虫算法,亲测可用,只需要更改main函数中的相关参数即可(Firefly algorithm, which can be used for pro testing, only needs to change the relevant parameters in the main function.)
Platform: | Size: 3072 | Author: Young_chow | Hits:

[OtherComparative study of FFA architectures using different multiplier and adder topologies

Description: Parallel FIR filter is the prime block of many modern communication application such as MIMO, multi-point transceivers etc. But hardware replication problem of parallel techniques make the system more bulky and costly. Fast FIR algorithm (FFA) gives the best alternative to traditional parallel techniques. In this paper, FFA based FIR structures with different topologies of multiplier and adder are implemented. To optimize design different multiplication technique like add and shift method, Vedic multiplier and booth multiplier are used for computation. Various adders such as carry select adder, carry save adder and Han-Carlson adder are analyzed for improved performance of the FFA structure. The basic objective is to investigate the performance of these designs for the tradeoffs between area, delay and power dissipation. Comparative study is carried out among conventional and different proposed designs. The advantage of presented work is that; based on the constraints, one can select the suitable design for specific application. It also fulfils the literature gap of critical analysis of FPGA implementation of FFA architecture using different multiplier and adder topologies. Xilinx Vivado HLS tool is used to implement the proposed designs in VHDL.
Platform: | Size: 1123027 | Author: nalevihtkas | Hits:

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