Description: 笔者长期从事移动通信系统的无线链路调制与解调、物理层实现方面的工作。在移动通信GSM系统中，我们进行语音或者业务信道解调时，都会遇到CRC的求解。通常在硬件DSP实现时，特别是40位CRC求解时候，由于生成多项式有41项，DSP最大一次能处理40位，所以使用单个寄存器会遇到一些困难，那么以下这个程序将会解决这一困难（这是针对定点DSP、C55xx的编程实现方法）。-The author has long been engaged in mobile communication system modulation and demodulation of wireless links, the physical layer to achieve work. GSM in the mobile communications system, we have a voice or channel demodulation operations, it will encounter the solution of CRC. DSP hardware usually realize, especially when solving the 40 CRC, as the generation polynomial has 41, DSP can handle the largest 40, so using a single register may encounter some difficulties, then following this process will solve this One difficulty (which is for fixed-point DSP, C55xx realize programming methods). Platform: |
Size: 3072 |
Author:戴浩 |
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Description: 笔者长期从事移动通信系统的无线链路调制与解调物理层实现方面的工作，所以在这里我们给出语音或者业务信道链路过程的交织与解交织的DSP实现方法。需要说明的是：这是针对定点DSP、C55xx的编程实现方法，希望对读者有益。-The author has long been engaged in mobile communication systems wireless link physical layer modulation and demodulation realize the work, so here we give voice channel link or business process interwoven with deinterleave realize the DSP approach. It should be noted that: This is for fixed-point DSP, C55xx programming realize, and I hope that useful to readers. Platform: |
Size: 3072 |
Author:戴浩 |
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Description:
对于这个问题的实现、刚刚给过一个程序，突然想起另外一种简单一些的方法，一并给出[笔者长期从事移动通信系统的无线链路调制与解调、物理层实现方面的工作。在移动通信GSM系统中，我们进行语音或者业务信道解调时，都会遇到CRC的求解。通常在硬件DSP实现时，特别是40位CRC求解时候，由于生成多项式有41项，DSP最大一次能处理40位，所以使用单个寄存器会遇到一些困难，那么以下这个程序将会解决这一困难（这是针对定点DSP、C55xx的编程实现方法）。]：
-For the realization of this issue, just to have a program, suddenly reminded of another simpler way to be given [the author has long been engaged in mobile communication system modulation and demodulation of wireless links, the physical layer to achieve work. GSM in the mobile communications system, we have a voice or channel demodulation operations, it will encounter the solution of CRC. DSP hardware usually realize, especially when solving the 40 CRC, as the generation polynomial has 41, DSP can handle the largest 40, so using a single register may encounter some difficulties, then following this process will solve this One difficulty (which is for fixed-point DSP, C55xx realize programming methods). ]: Platform: |
Size: 3072 |
Author:戴浩 |
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Description: 定点化调制的实现，为Intel CPU实现，用于加快仿真速度等（BPSK，QPSK，16QAM,64QAM)-Fixed-point realization of the modulation in 4G/3G communication, achieve for Intel CPU to speed up the simulation speed (BPSK, QPSK, 16QAM, 64QAM) Platform: |
Size: 2048 |
Author:arssur |
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Description: 本文首先介绍了逆变电源的发展现状及趋势。文中分析了适合数字控制的基于DSP 处理器 TMS320F2812 和智能功率模块（IPM）的逆变器硬件；介绍了 SVPWM逆变技术的基本理论，详细推导出了五种具体的 SVPWM 实现模式，并通过比较说明不同实现模式的优缺点，得到本课题采用的一种优化模式，设计研究了基于 SVPWM控制方式的软件；介绍了 Q 格式的基本理论，在程序中变量间的运算采用 Q 格式，提高了系统数据运算的速度和精度，实现了在定点处理器上进行高性能的浮点运算；详细讨论了片上模数转换模块的转换误差来源及影响，研究了减小转换误差的方法，采用了软件方法来对转换结果进行实时校正，提高了模数转换的准确度。-In the first, the current situation and development trends of the inverters are presented in the paper. Following is the analyses of hardware of the inverter suiting for digital control based on digital signal processor TMS320F2812 and the intelligent power module(IPM) the basic theory of space vector pulse width modulation (SVPWM) is introduced, five specific SVPWM modes of implementation are educed detailedly, following by the comparison which shows the advantages and disadvantages of different patterns, an optimization mode is got which is used in this project, and the software is designed based on SVPWM control pattern the basic theory of Q format is presented, variable Q format is adopted during the procedure for the calculation which improves the operation of the system data speed and precision, achieving the targeted processor for high-performance floating-point operation in the fixed-point DSP the error sources and effects of the on-chip analog-to-digital conversion module(A Platform: |
Size: 819200 |
Author:李游原 |
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Description: The application of digital predistortion in base-band
signal is an extended method of amplifier linearization
to reduce the Adjacent Channel Interference (ACI) in
those systems in which a varying envelope modulation
scheme is used. This paper propose a particular
predistorter configuration and presents some design
considerations and simulation results in relation with the
use of fixed point Digital Signal Processor (DSPs). Less
than -60 dB out-of-band emission can be obtained for a
narrow bandwidth system. Platform: |
Size: 464896 |
Author:sali |
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Description: LTE system,
OFDM modulation and Turbo
Coding, including Viterbi, BCJR
and SOVA are extensively analysed,
ending up with a system performance
specification. These are
used to implement a fixed length
Turbo encoder, a 16-QAM modulator
and a 16 point IFFT on an
FPGA using MATLAB Simulink⃝ R
with Xilinx⃝ R System Generator plugin.
A MATLAB⃝ R script is developed
to test the Simulink implementation.
In addition, an iterative
Turbo decoder is programmed using
MATLAB⃝ R . Platform: |
Size: 11264 |
Author:mezo |
Hits:
Description: LTE system,
OFDM modulation and Turbo
Coding, including Viterbi, BCJR
and SOVA are extensively analysed,
ending up with a system performance
specification. These are
used to implement a fixed length
Turbo encoder, a 16-QAM modulator
and a 16 point IFFT on an
FPGA using MATLAB Simulink⃝ R
with Xilinx⃝ R System Generator plugin.
A MATLAB⃝ R script is developed
to test the Simulink implementation.
In addition, an iterative
Turbo decoder is programmed using
MATLAB⃝ R . Platform: |
Size: 11264 |
Author:mezo |
Hits:
Description: Throughout the project the LTE system,
OFDM modulation and Turbo
Coding, including Viterbi, BCJR
and SOVA are extensively analysed,
ending up with a system performance
specification. These are
used to implement a fixed length
Turbo encoder, a 16-QAM modulator
and a 16 point IFFT on an
FPGA using MATLAB Simulink R ⃝
with Xilinx R ⃝ System Generator plugin.
A MATLAB R ⃝ script is developed
to test the Simulink implementation.
In addition, an iterative
Turbo decoder is programmed using
MATLAB R ⃝ .-Throughout the project the LTE system,
OFDM modulation and Turbo
Coding, including Viterbi, BCJR
and SOVA are extensively analysed,
ending up with a system performance
specification. These are
used to implement a fixed length
Turbo encoder, a 16-QAM modulator
and a 16 point IFFT on an
FPGA using MATLAB Simulink R ⃝
with Xilinx R ⃝ System Generator plugin.
A MATLAB R ⃝ script is developed
to test the Simulink implementation.
In addition, an iterative
Turbo decoder is programmed using
MATLAB R ⃝ . Platform: |
Size: 2099200 |
Author:mezo |
Hits:
Description: 在使用TI公司DSP2812编程时，设计到浮点向定点转化的需求，本代码以实现三相桥式逆变器SPWM调制为例，介绍一种简便的浮点定点转换方式。(n the use of DSP2812 programming in TI company, the demand of floating point conversion to fixed point is designed. This code is used to realize three phase bridge inverter SPWM modulation, and a simple floating point fixed point conversion method is introduced.) Platform: |
Size: 529408 |
Author:workwp |
Hits:
Search - fixed point modulation