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Description: 详细介绍LVDS，CML，PECL的电路原理，以及他们之间的耦合方式，通信专业人士用。-Details LVDS, CML, PECL circuit principle, as well as the coupling between them, communication with professionals.
Platform: |
Size: 258048 |
Author: 江山 |
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Description: • Dual ADC with 8-bit Resolution
• 500 Msps Sampling Rate per Channel, 1 Gsps in interleaved Mode
• Single or 1:2 Demultiplexed Output
• LVDS Output Format (100Ω)
• 500 mVpp Analog Input (Differential Only)
• Differential or Single-ended 50Ω PECL/LVDS Compatible Clock Inputs
• Power Supply: 3.3V (Analog), 3.3V (Digital), 2.25V (Output)
• LQFP144 or LQFP-ep 144L Green packages
• Temperature Range:
– 0°C < Tamb < 70° C (Commercial Grade)
– –40°C < Tamb < 85° C (Industrial Grade-• Dual ADC with 8-bit Resolution
• 500 Msps Sampling Rate per Channel, 1 Gsps in interleaved Mode
• Single or 1:2 Demultiplexed Output
• LVDS Output Format (100Ω)
• 500 mVpp Analog Input (Differential Only)
• Differential or Single-ended 50Ω PECL/LVDS Compatible Clock Inputs
• Power Supply: 3.3V (Analog), 3.3V (Digital), 2.25V (Output)
• LQFP144 or LQFP-ep 144L Green packages
• Temperature Range:
– 0°C < Tamb < 70° C (Commercial Grade)
– –40°C < Tamb < 85° C (Industrial Grade
Platform: |
Size: 609280 |
Author: 郭福珍 |
Hits:
Description: Dual ADC with 8-bit Resolution
• 1 Gsps Sampling Rate per Channel, 2 Gsps in Interleaved Mode
• Single or 1:2 Demultiplexed Output
• LVDS Output Format (100Ω)
• 500 mVpp Analog Input (Differential Only)
• Differential or Single-ended 50Ω PECL/LVDS Compatible Clock Inputs
• Power Supply: 3.3V (Analog), 3.3V (Digital), 2.25V (Output)
• LQFP144 or LQFP-ep 144L Green Packages
• Temperature Range:
– 0°C < Tamb < 70°C (Commercial Grade)
– –40°C < Tamb < 85°C (Industrial Grade)
• 3-wire Serial Interface
– 16-bit Data, 3-bit Address
– 1:2 or 1:1 Output Demultiplexer Ratio Selection
– Full or Partial Standby Mode
– Analog Gain (± 1.5 dB) Digital Control
– Input Clock Selection
– Analog Input Switch Selection
– Synchronous Data Ready Reset
– Data Ready Delay Adjustable on Both Channels-Dual ADC with 8-bit Resolution
• 1 Gsps Sampling Rate per Channel, 2 Gsps in Interleaved Mode
• Single or 1:2 Demultiplexed Output
• LVDS Output Format (100Ω)
• 500 mVpp Analog Input (Differential Only)
• Differential or Single-ended 50Ω PECL/LVDS Compatible Clock Inputs
• Power Supply: 3.3V (Analog), 3.3V (Digital), 2.25V (Output)
• LQFP144 or LQFP-ep 144L Green Packages
• Temperature Range:
– 0°C < Tamb < 70°C (Commercial Grade)
– –40°C < Tamb < 85°C (Industrial Grade)
• 3-wire Serial Interface
– 16-bit Data, 3-bit Address
– 1:2 or 1:1 Output Demultiplexer Ratio Selection
– Full or Partial Standby Mode
– Analog Gain (± 1.5 dB) Digital Control
– Input Clock Selection
– Analog Input Switch Selection
– Synchronous Data Ready Reset
– Data Ready Delay Adjustable on Both Channels
Platform: |
Size: 595968 |
Author: 郭福珍 |
Hits: