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Description: 利用MSP430的Timer A 模拟UART功能，波特率9600 32kHz ACLK-using MSP430 Timer A simulation function UART, 9600 Baud Rate 32kHz ACLK
Platform: |
Size: 2534 |
Author: 王懋 |
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Description: MSP-FET430P140 Demo - USART0, SPI Interface to HC165/164 Shift Registers
Description: Demonstrate USART0 in two-way SPI mode. Data are read from
an HC165, and same data written back to the HC164.
ACLK = n/a MCLK = SMCLK = default DCO = UCLK0 = DCO/2
* USART0 control bits are in different SFR s from other MSP430 s *
Platform: |
Size: 25026 |
Author: 梁武潔 |
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Description: 利用MSP430的Timer A 模拟UART功能，波特率9600 32kHz ACLK-using MSP430 Timer A simulation function UART, 9600 Baud Rate 32kHz ACLK
Platform: |
Size: 2048 |
Author: 王懋 |
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Description: 用比较器A进行斜边AD转换程序。
430F149:16位单片机平台,64K flash,2K RAM
MCLK：8MHz ACLK：32.768kHz-A device used for comparison hypotenuse AD conversion. 430F149 : 16 MCU platform, 64K flash, 2K RAM MCLK : 8MHz ACLK : 32.768kHz
Platform: |
Size: 43008 |
Author: 姜章军 |
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Description: MSP-FET430P140 Demo - USART0, SPI Interface to HC165/164 Shift Registers
Description: Demonstrate USART0 in two-way SPI mode. Data are read from
an HC165, and same data written back to the HC164.
ACLK = n/a MCLK = SMCLK = default DCO = UCLK0 = DCO/2
* USART0 control bits are in different SFR s from other MSP430 s *-MSP-FET430P140 Demo- USART0, SPI Interface to HC165/164 Shift Registers
Description: Demonstrate USART0 in two-way SPI mode. Data are read from
an HC165, and same data written back to the HC164.
ACLK = n/a MCLK = SMCLK = default DCO = UCLK0 = DCO/2
* USART0 control bits are in different SFR s from other MSP430 s*
Platform: |
Size: 24576 |
Author: 梁武潔 |
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Description: 程序功能：副臼笛槭墙玊AB中的数据写入AT45DB041中,在将数据从AT45DB041读出，并将数据放入250为首地址的RAM中
// 通过本实验了解MSP430对外围扩展的用法，写入的数据是21，22，23，24，25，26。
// 硬件连接：必须将拨动开关P_MEMORY的 P1、P2、P3、P4、P5、P6、P7都拨到ON的位置。-8MHz with auto-calibration by the FLL+.
// ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = DCO = (121+1) x 2 x ACLK = 7995392Hz
// //* An external watch c
Platform: |
Size: 915456 |
Author: creat |
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Description: msp430进入LMP3休眠模式，每4秒点亮LED灯-his program operates MSP430 normally in LPM3, pulsing P3.4
at 4 second intervals. WDT ISR used to wake-up system. All I/O configured
as low outputs to eliminate floating inputs. Current consumption does
increase when LED is powered on P3.4. Demo for measuring LPM3 current.
ACLK= LFXT1/4= 32768/4, MCLK= SMCLK= default DCO
Platform: |
Size: 19456 |
Author: 陈天赐 |
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Description: msp430f149的串口调试程序，晶振为8M 和32768-MSP-FET430P140 Demo- USART0 UART 115200 Echo ISR, HF XTAL ACLK
Platform: |
Size: 7168 |
Author: chy |
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Description: msp430的时钟设定API程序，包括XT2的开关，DCO的设定和MCLK及SMCLK的时钟源选择，从此不用记寄存器
void XT2_on()
void XT2_off()
void DCOset(BYTE freq) //1,2,4,8,10,12,14,15,16,20,32
void Msource(char source) //enum:ACLK,XT2,DCO
void SMsource(char source) //enum:XT2,DCO-msp430‘s clock settings API procedures, including the XT2 switch, DCO and SMCLK set and MCLK clock source selection, from not remember register void XT2_on () void XT2_off () void DCOset (BYTE freq) // 1 , 2,4,8,10,12,14,15,16,20,32 void Msource (char source) // enum: ACLK, XT2, DCO void SMsource (char source) // enum: XT2, DCO
Platform: |
Size: 2048 |
Author: 水果糖 |
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Description: A single sample is made on A0 with reference to AVcc. Software sets ADC12SC to start sample and conversion - ADC12SC automatically cleared at EOC. ADC12 internal oscillator times sample (16x) and conversion. In Mainloop MSP430 waits in LPM0 to save power until ADC12 conversion is complete. ADC12_ISR forces exit from LPM0 in Mainloop on reti. If A0 > 0.5*AVcc P5.1 is set, else it s reset. ACLK = n/a, MCLK = SMCLK = default DCO, ADC12CLK = ADC12OSC-A single sample is made on A0 with reference to AVcc. Software sets ADC12SC to start sample and conversion - ADC12SC automatically cleared at EOC. ADC12 internal oscillator times sample (16x) and conversion. In Mainloop MSP430 waits in LPM0 to save power until ADC12 conversion is complete. ADC12_ISR forces exit from LPM0 in Mainloop on reti. If A0 > 0.5*AVcc P5.1 is set, else it s reset. ACLK = n/a, MCLK = SMCLK = default DCO, ADC12CLK = ADC12OSC
Platform: |
Size: 1024 |
Author: OhmLeTzBooM |
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Description: msp430的DMA例子程序。用于实验板，用于15x 16x。MCLK：8MHz ACLK：32.768kHz-msp430' s DMA sample application. For the experimental plate for 15x 16x. MCLK: 8MHz ACLK: 32.768kHz
Platform: |
Size: 21504 |
Author: 程佩 |
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Description: MSP430单片机时钟测试程序，包括ACLK,MCLK,SMCLK-MSP430 MCU clock testing procedures, including ACLK, MCLK, SMCLK
Platform: |
Size: 33792 |
Author: zxy |
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Description: MSP430串口通信，波特率2400。回显收到的字符-USART0, Ultra-Low Pwr UART 2400 Echo ISR, 32kHz ACLK
Platform: |
Size: 1024 |
Author: boomzip |
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Description: MSP430串口0通信，回显收到的字符。波特率96-USART0, UART 9600 Echo ISR, HF XTAL ACLK
Platform: |
Size: 1024 |
Author: boomzip |
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Description: MSP430串口0通信，回显收到的字符。波特率19200.-USART0, UART 19200 Echo ISR, XT2 HF XTAL ACLK. Echo a received character, RX ISR used. Normal mode is LPM0,USART0 RX interrupt triggers TX Echo. Though not required, MCLK = XT2.ACLK = n/a, MCLK = SMCLK = UCLK0 = XT2 = 8MHz
Platform: |
Size: 1024 |
Author: boomzip |
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Description: 利用MSP430单片机生成PWM波，并从P2.6脚输出。-MSP-FET430x110 Demo- Comp_A Output Comparator_A reference voltages on P2.Description Output comparator_A reference levels on P2.3. Program will
cycle through the on-chip comparator_A reference voltages with output on
P2.3. Normal mode is LPM0, TA0_ISR will interrupt LPM0.ACLK = n/a, MCLK = SMCLK = default DCO ~ 800kHz
Platform: |
Size: 2048 |
Author: 韩艳超 |
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Description: 利用MSP430单片机生成PWM波，并从P2.6脚输出-MSP-FET430x110 Demo- Comp_A Output Comparator_A reference voltages on P2.Description Output comparator_A reference levels on P2.3. Program will
cycle through the on-chip comparator_A reference voltages with output on
P2.3. Normal mode is LPM0, TA0_ISR will interrupt LPM0.ACLK = n/a, MCLK = SMCLK = default DCO ~ 800kHz
Platform: |
Size: 2048 |
Author: 韩艳超 |
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Description: 首先，是对IAR Embedded Workbench开发环境的了解与使用，包括硬件环境与软件环境两部分，学习了如何建立工程，如何编写程序，如何将程序下载到板子上并进行在线调试。然后练习了 MSP430 单片机基本时钟模块的原理及使用方法，主要是利用LFXT1CLK 、XT2CLK 和DCOCLK 三个时钟源为ACLK（辅助时钟）MCLK（系统主时钟）SMLK（子系统时钟）提供时钟，实验结果可以用示波器来观察波形并进行频率的测量-First of all, understanding and use of IAR Embedded Workbench development environment, including the two parts of the hardware environment and software environment, learning how to create a project, how to program, how the program is downloaded to the board and in-circuit debugging. Then practice the principle and method of use of the basic clock module of the MSP430 microcontroller, is the use of the LFXT1CLK, XT2CLK DCOCLK three clock source for ACLK (auxiliary clock) the MCLK (master clock) SMLK (subsystem clock) clock, and experimental results with an oscilloscope to observe waveforms and frequency measurement
Platform: |
Size: 79872 |
Author: 欣然 |
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Description: GPS MSP430 LCD12864
GPS接收模块接受信息，MSP430单片机处理，LCD12864显示。-GPS MSP430 LCD12864
GPS receiver module receiving information, MSP430 single chip microcomputer processing, display LCD12864.
Platform: |
Size: 39936 |
Author: 司明 |
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Description: 利用P2.0输出的时钟信号ACLK来模拟外部的脉冲电平，利用捕获/比较器1来
进行脉冲宽度测量，这里利用的是子系统SMCLK时钟来作为计数的。
测量脉冲宽度计算公式：[overflow*65535+(end-start)]*SMclk(周期)
MCLK：8MHz SCLK：1MHz ACLK:32768Hz/8
待测信号：1/[32768/8(分频)]*（1/2）=高电平时间
参考信号测量：(end-start)]*SMclk(1/1M)=122/10^6
描述：将P2.0引脚与P1.2引脚相连(The output clock signal ACLK is used to simulate the external pulse level, using the capture / comparator 1 to P2.0
Pulse width measurement, where the subsystem SMCLK clock is used as a count.
The formula of measuring pulse width is [overflow*65535+ (end-start)]*SMclk (cycle)
MCLK:8MHz SCLK:1MHz ACLK:32768Hz/8
The sensing signal (frequency: 1/[32768/8)]* (1/2) = high level time
Reference signal measurement: (end-start)]*SMclk (1/1M) =122/10^6
Description: connect the P2.0 pin to the P1.2 pin)
Platform: |
Size: 104448 |
Author: 无可施及
|
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