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Description: Use the verilog language write a MIPS CPU code, and have additional instruction, for example: selection sort instruction.
The code has contain combination circuit and sequenial circuit.
CPU have contain ALU, ADD, ALU_CONTROL, DATA_MEMORY, INST_MEMORY, REGISTER, PC, and TESTBRANCH.-Use the verilog language write a MIPS CPU code, and have additional instruction, for example: selection sort instruction. The code has contain combination circuit and sequenial circuit. CPU have contain ALU, ADD, ALU_CONTROL, DATA_MEMORY, INST_MEMORY, REGISTER, PC, and TESTBRANCH.
Platform: |
Size: 8960 |
Author: 張大小 |
Hits:
Description: Use the verilog language write a MIPS CPU code, and have additional instruction, for example: selection sort instruction.
The code has contain combination circuit and sequenial circuit.
CPU have contain ALU, ADD, ALU_CONTROL, DATA_MEMORY, INST_MEMORY, REGISTER, PC, and TESTBRANCH.-Use the verilog language write a MIPS CPU code, and have additional instruction, for example: selection sort instruction. The code has contain combination circuit and sequenial circuit. CPU have contain ALU, ADD, ALU_CONTROL, DATA_MEMORY, INST_MEMORY, REGISTER, PC, and TESTBRANCH.
Platform: |
Size: 8192 |
Author: 張大小 |
Hits: