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Description: spce061a驱动nRF2041完整接口函数-nRF2041 integrity SPCE061A drive interface function
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Author: Dirk |
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Description: 开发环境：unSP IDE 2.0.0
实验目的:
1)了解SPCE061 PLL 振荡器的功能及其应用。
2)掌握系统时钟单元P_SystemClock的设置方法。
3)熟悉系统时钟和CPU时钟频率的编程方法。
实验设备:
1)装有µ ’nSP™ IDE仿真环境的PC机一台。
2)µ ’nSP™ 十六位单片机实验箱一个。
3)示波器一台。
实验原理:
在SPCE061A内，P_SystemClock(写)($7013H)单元控制着系统时钟和CPU时钟。通过设置该单元的B5-B7位可以改变系统时钟的频率(Fosc=20/24/32/40/49MHz)；将第0-2位置为“111”可以使CPU时钟停止工作，系统切换至低功耗的备用状态。在备用状态下，通过设置该单元的B4位可以接通或关闭32KHz实时时钟。而且通过设置该单元的B3位可以使32768Hz时钟处自动弱振或强振状态。本实验通过选择不同Fosc信号频率或改变CPUClk频率来观察发光二极管亮灭的快慢。
实验步骤:
1）根据实验内容连接硬件电路并检查。
2）画流程图并编写程序代码。
3）编译程序，软件调试。
4）观察LED亮灭的快慢，并通过示波器观察波形。
要求: LED亮灭的快慢及通过示波器观察波形反映的定时信号与设计一致.
(综合要求：要能通过键盘动态改变系统时钟和CPU时钟频率。)-The experiment:
1) Learn SPCE061 PLL oscillator function and its application.
2) master the system clock unit P_SystemClock setting method.
3) familiar with the system clock and CPU clock frequency programming method.
Laboratory equipment:
1) with μ nSP ™ IDE emulation environment for PC machine.
2) μ nSP ™ 16 single-chip experiment box one.
3) an oscilloscope.
Experimental principle:
In SPCE061A inside, P_SystemClock (W) ($ 7013H) unit controls the system clock and CPU clock. By setting the unit B5-B7 bit can change the system clock frequency (Fosc = 20/24/32/40/49MHz) 0-2 position of the first "111" can make the CPU clock is stopped, the system switches to low standby power. In the standby state, by setting the unit can be switched on or off B4 32KHz bit real time clock. And by setting the unit B3 bit 32768Hz clock can automatically at the weak state of vibration or strong vibration. This experiment by choosing different Fosc frequency signal frequency or change
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Author: niu |
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