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Description: Turbo Decoder Release 0.3
* Double binary, DVB-RCS code
* Soft Output Viterbi Algorithm
* MyHDL cycle/bit accurate model
* Synthesizable VHDL model
-Turbo Decoder Release 0.3 * Double binary, DVB-RCS code * Soft Output Viterbi Algorithm * M yHDL cycle / bit accurate model * Synthesizable VHDL model
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Size: 154770 |
Author: 鲁京 |
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Description: 采用 DVB反向链路(DVB-RCS)标准中的双二元Turbo码matlab仿真程序和仿真结果。支持1/2和1/3码率。支持MAP,LOG-MAP解码算法。
Platform: |
Size: 48841 |
Author: 李明 |
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Description: Turbo Decoder Release 0.3
* Double binary, DVB-RCS code
* Soft Output Viterbi Algorithm
* MyHDL cycle/bit accurate model
* Synthesizable VHDL model
-Turbo Decoder Release 0.3* Double binary, DVB-RCS code* Soft Output Viterbi Algorithm* M yHDL cycle/bit accurate model* Synthesizable VHDL model
Platform: |
Size: 154624 |
Author: |
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Description: 这是一个很好的Turbo码学习的程序,可以供初学者更好的学习。-This is a very good learning Turbo Code procedures, better for beginners to learn.
Platform: |
Size: 17408 |
Author: 赵连杰 |
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Description: 采用 DVB反向链路(DVB-RCS)标准中的双二元Turbo码matlab仿真程序和仿真结果。支持1/2和1/3码率。支持MAP,LOG-MAP解码算法。-The use of DVB reverse link (DVB-RCS) standard double-binary Turbo code matlab simulation program and simulation results. Support for 1/2 and 1/3 rate. Support MAP, LOG-MAP decoding algorithm.
Platform: |
Size: 48128 |
Author: 李明 |
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Description: MAP 算法 源程序 第三代 数字通信 turbo码相关 -MAP algorithm source third-generation digital communications turbo code related
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Size: 8192 |
Author: |
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Description: 基于sova算法的Turbo码解码VHDL工程文件,非常经典,包含Python高层仿真代码。-Turbo Decoder Release 0.3
MAIN FEATURES
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* Double binary, DVB-RCS code
* Soft Output Viterbi Algorithm
* MyHDL cycle/bit accurate model
* Synthesizable VHDL model
AUTHOR
David Brochart <dbrochart@opencores.org>
Platform: |
Size: 168960 |
Author: John Smith |
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Description: Turbo Decoder Release 0 3 Double binary, DVB-RCS code Soft Out()
Platform: |
Size: 74752 |
Author: mirwware |
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Description: Turbo Decoder Release 0 3 Double binary, DVB-RCS code Soft Out()
Platform: |
Size: 74752 |
Author: pintayt |
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