Description: Xinhua Cup first prize works: audio signal analyzer FPGA source, VHDL prepared, Quartus7.1 integrated, ModelSim6.2g se simulation, application of open source opencores.org on FFT IP core, joined the 8051 bus interface and ram
- [JPEGSourceCode] - JPEG encoding source
- [DW8051_2] - DW8051 High-Speed 8051 IP Core, I tested
- [fftverilog] - FFT realize on the Verilog code,
- [EP2C5Q208] - Cyclone in series as the core EP2C5Q208
- [Sin_wave] - sin waveform signal from the procedure d
- [DDS] - DDS-based digital phase-shifting sinusoi
- [mc8051] - FPGA can be run on 8051 IP core, is to l
- [jpeg] - This is a JPEG codec the VHDL code
- [web_cpu88] - Realization of intel microprocessor 8088
- [2007] - The digital oscilloscope and a single-ch
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