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- 2008-10-13
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Description: ad sampling, by the CPLD deal, deposited by the serial ram 1000 points to restore the da
- [dpram_fpga] - This is the language I used vhdl in fpga
- [vhdl_ad0809_arm] - this program is written in VHDL, includi
- [dualportRAM] - dual-port RAM VHDL. Totally CPLD chip te
- [ADC1] - Using FPGA to achieve the ADC sampler, u
- [50vvoltmeter] - Through an external keyboard to the syst
- [cc2420interfacecs] - On the CC2420 radio module interface. Re
- [EP1C3_12_5_RSV] - FPGA-based digital storage oscilloscope,
- [AD] - FPGA control module of the AD7321 is per
- [AD-DA] - 10 AD \ DA' s source code, testing ca
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