Description: The baud rate generator of uart is designed to generate 9600Hz baud rate of 40MHz main frequency
- [Altera_uart_VHDL] - FPGA/CPLD applications, UART communicati
- [UART] - UART classical procedures, UART VHDL des
- [new-lins-uart-all] - Selfless dedication, VHDL source code fo
- [UART] - Input clock 20M, the baud rate for 9600,
- [LineFill] - Fast arbitrary polygon filling algorithm
- [uart] - This is the UART controller, has been ru
- [uart] - FPGA-based UART controller, an optional
- [uart_v11] - serial UART VHDL Language Program. I deb
- [16X2-LCD-FPGA] - 16x2 LCD display driver design of the FP
- [uart16450] - collection of uart controller 16450
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