Description: Digital Component Design, verylog, using D-FLIP FLOP realize Counter.
- [srff] - SR flip flop is implemented using VHDL
- [hdl] - cnt_top,It is used to realize a D flip f
File list (Check if you may need any files):
couuntHDL
.........\cmp_state.ini
.........\countHDL.asm.rpt
.........\countHDL.done
.........\countHDL.fit.eqn
.........\countHDL.fit.rpt
.........\countHDL.fit.summary
.........\countHDL.flow.rpt
.........\countHDL.map.eqn
.........\countHDL.map.rpt
.........\countHDL.map.summary
.........\countHDL.pin
.........\countHDL.pof
.........\countHDL.qpf
.........\countHDL.qsf
.........\countHDL.qws
.........\countHDL.sim.rpt
.........\countHDL.sof
.........\countHDL.tan.rpt
.........\countHDL.tan.summary
.........\countHDL.v
.........\countHDL.vwf
.........\db
.........\..\add_sub_nsh.tdf
.........\..\countHDL.asm.qmsg
.........\..\countHDL.cbx.xml
.........\..\countHDL.cmp.cdb
.........\..\countHDL.cmp.hdb
.........\..\countHDL.cmp.rdb
.........\..\countHDL.cmp.tdb
.........\..\countHDL.cmp0.ddb
.........\..\countHDL.db_info
.........\..\countHDL.eco.cdb
.........\..\countHDL.eds_overflow
.........\..\countHDL.fit.qmsg
.........\..\countHDL.fnsim.cdb
.........\..\countHDL.fnsim.hdb
.........\..\countHDL.hier_info
.........\..\countHDL.hif
.........\..\countHDL.map.cdb
.........\..\countHDL.map.hdb
.........\..\countHDL.map.qmsg
.........\..\countHDL.pre_map.cdb
.........\..\countHDL.pre_map.hdb
.........\..\countHDL.psp
.........\..\countHDL.rtlv.hdb
.........\..\countHDL.rtlv_sg.cdb
.........\..\countHDL.rtlv_sg_swap.cdb
.........\..\countHDL.sgdiff.cdb
.........\..\countHDL.sgdiff.hdb
.........\..\countHDL.signalprobe.cdb
.........\..\countHDL.sim.hdb
.........\..\countHDL.sim.qmsg
.........\..\countHDL.sim.rdb
.........\..\countHDL.sim.vwf
.........\..\countHDL.sld_design_entry.sci
.........\..\countHDL.sld_design_entry_dsc.sci
.........\..\countHDL.syn_hier_info
.........\..\countHDL.tan.qmsg
.........\..\countHDL_cmp.qrpt
.........\..\countHDL_sim.qrpt
D-Counter
.........\cmp_state.ini
.........\D-Counter.asm.rpt
.........\D-Counter.bdf
.........\D-Counter.cdf
.........\D-Counter.done
.........\D-Counter.fit.eqn
.........\D-Counter.fit.rpt
.........\D-Counter.fit.summary
.........\D-Counter.flow.rpt
.........\D-Counter.map.eqn
.........\D-Counter.map.rpt
.........\D-Counter.map.summary
.........\D-Counter.pin
.........\D-Counter.pof
.........\D-Counter.qpf
.........\D-Counter.qsf
.........\D-Counter.qws
.........\D-Counter.sim.rpt
.........\D-Counter.sof
.........\D-Counter.tan.rpt
.........\D-Counter.tan.summary
.........\D-Counter.v
.........\D-Counter.vwf
.........\db
.........\..\D-Counter.asm.qmsg
.........\..\D-Counter.cbx.xml
.........\..\D-Counter.cmp.cdb
.........\..\D-Counter.cmp.hdb
.........\..\D-Counter.cmp.logdb
.........\..\D-Counter.cmp.rdb
.........\..\D-Counter.cmp.tdb
.........\..\D-Counter.cmp0.ddb
.........\..\D-Counter.db_info
.........\..\D-Counter.eco.cdb
.........\..\D-Counter.eds_overflow
.........\..\D-Counter.fit.qmsg
.........\..\D-Counter.fnsim.hdb
.........\..\D-Counter.hier_info
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