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Title: x1Altera_uart_VHDL Download
 Description: UART classical procedures, UART VHDL design language, to help everyone study UART knowledge
 Downloaders recently: [More information of uploader china_xzq]
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File list (Check if you may need any files):
address_decode_rtl.vhd
clock_divider.v
control_operation_fsm.vhd
cpu_interface_rtl.vhd
serial_interface_rtl.vhd
status_registers_rtl.vhd
tester.v
uart_tb.v
uart_top_rtl.vhd
xmit_rcv_control_fsm.vhd
    

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