utx UTOPIA L2 interfaces sent VERILOG code - CodeBus

Welcome！[Sign In] ！[Sign Up]！

Front-page it | Collect it | [中国-简体中文]

FAQ Fav

Location:

Embeded-SCM Develop

SCM

Title: utx

Category:
SCM
Tags:
[VHDL] [源码]
File Size:
6kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
yibo980619

Description: UTOPIA L2 interfaces sent VERILOG code

Downloaders recently: [More information of uploader yibo980619]

To Search: utopia

[ATM standard agreement zip] - ATM standard agreement
[1] - utopia main mode for sending and receivi
[UTOPIA] - utopia interface module VHDL source code

File list (Check if you may need any files):

utx.v

CodeBus www.codebus.net

“CodeBus” is the largest source code store in internet!

1999-2018 CodeBus All Rights Reserved.