Description: UART is a widely used short-range, low-speed, low-cost serial transmission interface communication. Because of the complexity of common UART chip and poor transplant, using a programmable FPGA devices to achieve UART way of the realization of the UART modular design. First of all, a brief introduction of the basic characteristics of UART, and then according to their top-level module system design, and then the design of finite state machine receiver module and transmitter module, the realization of all the features to describe the use of VHDL and Modelsim software used Simulation of all modules. Finally, the UART core functionality into the FPGA, so that the overall design of compact, compact, the UART function of the realization of stable and reliable.
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基于VHDL的UART接收器模块设计.doc
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