Description: DIP switch control PWM duty cycle is 16, corresponding to voltage of 3.3 volts, one of the 16 sub-multiples
- [systemverilog] - system Verilog Programming
- [pwm] - Realization of PWM waveform using the VH
File list (Check if you may need any files):
pwmtest
.......\cmp_state.ini
.......\db
.......\..\sensortest.asm.qmsg
.......\..\sensortest.cbx.xml
.......\..\sensortest.cmp.cdb
.......\..\sensortest.cmp.hdb
.......\..\sensortest.cmp.logdb
.......\..\sensortest.cmp.rdb
.......\..\sensortest.cmp.tdb
.......\..\sensortest.cmp0.ddb
.......\..\sensortest.dbp
.......\..\sensortest.db_info
.......\..\sensortest.eco.cdb
.......\..\sensortest.fit.qmsg
.......\..\sensortest.hier_info
.......\..\sensortest.hif
.......\..\sensortest.map.cdb
.......\..\sensortest.map.hdb
.......\..\sensortest.map.logdb
.......\..\sensortest.map.qmsg
.......\..\sensortest.pre_map.cdb
.......\..\sensortest.pre_map.hdb
.......\..\sensortest.psp
.......\..\sensortest.pss
.......\..\sensortest.rtlv.hdb
.......\..\sensortest.rtlv_sg.cdb
.......\..\sensortest.rtlv_sg_swap.cdb
.......\..\sensortest.sgdiff.cdb
.......\..\sensortest.sgdiff.hdb
.......\..\sensortest.sld_design_entry.sci
.......\..\sensortest.sld_design_entry_dsc.sci
.......\..\sensortest.syn_hier_info
.......\..\sensortest.tan.qmsg
.......\..\sensortest.tis_db_list.ddb
.......\..\sensortest_cmp.qrpt
.......\pwm_fpga.vhdl
.......\sensortest.asm.rpt
.......\sensortest.done
.......\sensortest.dpf
.......\sensortest.fit.eqn
.......\sensortest.fit.rpt
.......\sensortest.fit.summary
.......\sensortest.flow.rpt
.......\sensortest.map.eqn
.......\sensortest.map.rpt
.......\sensortest.map.summary
.......\sensortest.pin
.......\sensortest.pof
.......\sensortest.qpf
.......\sensortest.qsf
.......\sensortest.qws
.......\sensortest.tan.rpt
.......\sensortest.tan.summary
.......\sensortest.vhd
.......\sensortest_assignment_defaults.qdf
Download