Description: Implementation of the CCD acquisition system based on CPLD design of VHDL source code, compiles,
- [adc_vhdl.tar] - control adc vhdl code spartan 3e starter
- [traffic] - With the FPGA implementation of traffic
- [FPGASPI] - fpga design the SPI code
- [Verilog_sdram] - Verilog write SDRAM interface control in
- [line_ccd] - High Speed Linear CCD Image Data Acquisi
- [CCD] - This design is mainly used for image acq
File list (Check if you may need any files):
实现基于CPLD的CCD采集系统设计源码.pdf