divide6 Synchronous design using the six-frequency

Title: divide6

Category:
MultiLanguage
Tags:
[VHDL] [源码]
File Size:
14kb
Update:
2012-11-26
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Uploaded by:
yjh841117

Description: Synchronous design using the six-frequency circuits, saving system resources. Simulation results to compile correctly

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divide6
.......\db
.......\..\divide6.db_info
.......\..\divide6.eco.cdb
.......\..\divide6.sld_design_entry.sci
.......\divide6.flow.rpt
.......\divide6.map.rpt
.......\divide6.map.summary
.......\divide6.qpf
.......\divide6.qsf
.......\divide6.qws
.......\divide6.v
.......\divide6_assignment_defaults.qdf