Description: Able to achieve based on the DDS output sine wave-shaped part of the procedure, the use of Verilog HDL language.
- [dds(heli)] - DDS using verilog realized, can be squar
- [DDS] - Our group for a month to do a total of D
- [ddsmodem] - modem ask, fsk, psk program susing DDS
- [2psk] - 2psk Verilog module implementation (carr
File list (Check if you may need any files):
dds_top.txt
tu.doc