SPI wishbone master and verification environment

spi_master
..........\bench
..........\.....\testCase0.v
..........\.....\testHarness.v
..........\doc
..........\...\spiMaster_FSM.pdf
..........\...\spiMaster_Specification.pdf
..........\lgpl-3_0.txt
..........\model
..........\.....\sdModel.v
..........\.....\wb_master_model.v
..........\RTL
..........\...\ctrlStsRegBI.v
..........\...\initSD.v
..........\...\readWriteSDBlock.v
..........\...\readWriteSPIWireData.v
..........\...\sendCmd.v
..........\...\sm_dpMem_dc.v
..........\...\sm_fifoRTL.v
..........\...\sm_RxFifo.v
..........\...\sm_RxFifoBI.v
..........\...\sm_TxFifo.v
..........\...\sm_TxFifoBI.v
..........\...\spiCtrl.v
..........\...\spiMaster.v
..........\...\spiMasterWishBoneBI.v
..........\...\spiMaster_defines.v
..........\...\spiTxRxData.v
..........\...\timescale.v
..........\sim
..........\...\compile_do

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