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Title: my_nand Download
 Description: NAND gate, Verilog implementation, with test documentation.
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与非门实验例程及文档
....................\my_nand
....................\.......\component
....................\.......\.........\work
....................\.......\.........\....\my_nand
....................\.......\.........\....\.......\my_nand.cxf
....................\.......\.........\....\.......\my_nand.sdb
....................\.......\.........\....\.......\my_nand.v
....................\.......\.........\....\.......\testbench.v
....................\.......\constraint
....................\.......\coreconsole
....................\.......\designer
....................\.......\........\impl1
....................\.......\........\.....\designer.log
....................\.......\........\.....\my_nand.adb
....................\.......\........\.....\my_nand.dtf
....................\.......\........\.....\...........\verify.log
....................\.......\........\.....\my_nand.ide_des
....................\.......\........\.....\my_nand.pdb
....................\.......\........\.....\my_nand.pdb.depends
....................\.......\........\.....\my_nand.tcl
....................\.......\........\.....\my_nand_fp
....................\.......\........\.....\..........\$$FlashPro_FPBBALTLPT1.L$$
....................\.......\........\.....\..........\my_nand.log
....................\.......\........\.....\..........\my_nand.pro
....................\.......\........\.....\..........\projectData
....................\.......\........\.....\..........\...........\my_nand.pdb
....................\.......\........\.....\simulation
....................\.......\hdl
....................\.......\my_nand.prj
....................\.......\phy_synthesis
....................\.......\simulation
....................\.......\..........\modelsim.ini
....................\.......\smartgen
....................\.......\........\my_nand_work.ixf
....................\.......\........\smartgen.aws
....................\.......\stimulus
....................\.......\synthesis
....................\.......\.........\backup
....................\.......\.........\......\my_nand.srr
....................\.......\.........\coreip
....................\.......\.........\my_nand.areasrr
....................\.......\.........\my_nand.edn
....................\.......\.........\my_nand.map
....................\.......\.........\my_nand.pdc
....................\.......\.........\my_nand.sdf
....................\.......\.........\my_nand.so
....................\.......\.........\my_nand.srd
....................\.......\.........\my_nand.srm
....................\.......\.........\my_nand.srr
....................\.......\.........\my_nand.srs
....................\.......\.........\my_nand.szr
....................\.......\.........\my_nand.tlg
....................\.......\.........\my_nand_sdc.sdc
....................\.......\.........\my_nand_syn.prj
....................\.......\.........\run_options.txt
....................\.......\.........\stdout.log
....................\.......\.........\syntmp
....................\.......\.........\......\my_nand.plg
....................\.......\viewdraw
....................\.......\........\sch
....................\.......\........\sym
....................\.......\........\vf
....................\.......\........\..\project.lst
....................\.......\........\viewdraw.ini
....................\.......\........\wir
....................\与非门.pdf
    

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