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Title: vidicon Download
 Description: vidicon s catch and collection in VHDL
 Downloaders recently: [More information of uploader 蔡玉强]
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用FPGA来实现摄像头的捕捉和采集\用FPGA来实现摄像头的捕捉和采集\Digital_Camera\Camera_Control_Exe\camera_control.exe
..............................\..............................\..............\..................\data_out.bin
..............................\..............................\..............\..................\DLPORTIO.dll
..............................\..............................\..............\..................\uniio.dll
..............................\..............................\..............\camera_control_Source\Bitmap.cpp
..............................\..............................\..............\.....................\bitmap.h
..............................\..............................\..............\.....................\camera_control.cpp
..............................\..............................\..............\.....................\camera_control.dsp
..............................\..............................\..............\.....................\camera_control.dsw
..............................\..............................\..............\.....................\camera_control.ncb
..............................\..............................\..............\.....................\camera_control.opt
..............................\..............................\..............\.....................\camera_control.plg
..............................\..............................\..............\.....................\DLPORTIO.dll
..............................\..............................\..............\.....................\hardware_interface.cpp
..............................\..............................\..............\.....................\hardware_interface.h
..............................\..............................\..............\.....................\icon1.ico
..............................\..............................\..............\.....................\image_manip.cpp
..............................\..............................\..............\.....................\image_manip.h
..............................\..............................\..............\.....................\mystructs.h
..............................\..............................\..............\.....................\Needed_dlls.txt
..............................\..............................\..............\.....................\resource.h
..............................\..............................\..............\.....................\Script1.aps
..............................\..............................\..............\.....................\Script1.rc
..............................\..............................\..............\.....................\string_buffer.cpp
..............................\..............................\..............\.....................\string_buffer.h
..............................\..............................\..............\.....................\uniio.dll
..............................\..............................\..............\.....................\Xsport.cpp
..............................\..............................\..............\VHDL_Source\asyn_fifo_block.vhd
..............................\..............................\..............\...........\asyn_fifo_distrib.edn
..............................\..............................\..............\...........\asyn_fifo_distrib.vhd
..............................\..............................\..............\...........\asyn_fifo_distrib_64.edn
..............................\..............................\..............\...........\asyn_fifo_distrib_64.vhd
..............................\..............................\..............\...........\blank.ucf
..............................\..............................\..............\...........\block_ram_2kx16.edn
..............................\..............................\..............\...........\block_ram_2kx16.vhd
..............................\..............................\..............\...........\clockdivider.vhd
..............................\...................

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