Description:
Various memories for Xilinx and Altera FPGA devices. Single-port and
Dual-port versions with various numbers of read and write ports. Bundle
also includes read-first and write-first varieties with sync and async
clocks.
All memory components are generic, permitting the word width and number
of words to be specified easily.
- [SRAM] - FPGA control SRAM61LV25616 vhdl source.
File list (Check if you may need any files):
ram_dp_w_r_bp.vhd
ram_sp.vhd
readme.txt
rom_sp.vhd
xst_reports.txt
ram_dp_rw_r.vhd
ram_dp_rw_r_async.vhd
ram_dp_rw_r_bp.vhd
ram_dp_w_r.vhd
ram_dp_w_r_async.vhd
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