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VHDL-FPGA-Verilog
Title:
FIFOadnVHDL
Download
Category:
VHDL-FPGA-Verilog
Tags:
[Text]
File Size:
3kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
sdbj2005
Description:
FIFO (先进先出队列)是一种在电子系统得到广泛应用的器件,通常用于数据的缓存和用于容纳异步信号的频率或相位的差异。
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File list
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FIFOadnVHDL.txt
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