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VHDL-FPGA-Verilog
Title:
8_dv
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Category:
VHDL-FPGA-Verilog
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File Size:
738kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
hlayumi1234
Description:
A simple flip-flop implementation, called the IP core, relatively simple, suitable for beginners
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8_除法器\8_除法器.rar 8_除法器
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