dctcode\16bitaddg.vhd
.......\add_i.vhd
.......\add_sub2bit.vhd
.......\add_sub2bit.vhd.bak
.......\dctimage.vhd
.......\dctimage.vhd.bak
.......\delay10.vhd
.......\delay10.vhd.bak
.......\gjhgj.cr.mti
.......\jghjh.mpf
.......\load.vhd
.......\packi.vhd
.......\parellelshiftout_2bitreg.vhd
.......\parellelshiftout_2bitreg.vhd.bak
.......\regh.vhd
.......\register12.vhd
.......\register12.vhd.bak
.......\resultout.vhd
.......\rom.vhd
.......\rom.vhd.bak
.......\serial_parallel.vhd
.......\serial_parallel.vhd.bak
.......\shiftright1bit.vhd
.......\shiftright1bit.vhd.bak
.......\shiftright2bitreg.vhd
.......\shi_2.vhd
.......\testbench.vhd
.......\testbench213.vhd
.......\testbenchhh.vhd
.......\transcript
.......\work\add_g\beh.asm
.......\....\.....\beh.dat
.......\....\.....\_primary.dat
.......\....\....i\beh.asm
.......\....\.....\beh.dat
.......\....\.....\_primary.dat
.......\....\..su\beh.asm
.......\....\....\beh.dat
.......\....\....\_primary.dat
.......\....\delay10\beh.asm
.......\....\.......\beh.dat
.......\....\.......\_primary.dat
.......\....\load\beh.asm
.......\....\....\beh.dat
.......\....\....\_primary.dat
.......\....\packi\body.asm
.......\....\.....\body.dat
.......\....\.....\_primary.dat
.......\....\.....\_vhdl.asm
.......\....\reg1\beh.asm
.......\....\....\beh.dat
.......\....\....\_primary.dat
.......\....\...h\beh.asm
.......\....\....\beh.dat
.......\....\....\_primary.dat
.......\....\..sult\beh.asm
.......\....\......\beh.dat
.......\....\......\_primary.dat
.......\....\.om\_primary.dat
.......\....\shift\beh.asm
.......\....\.....\beh.dat
.......\....\.....\_primary.dat
.......\....\..._1\beh.asm
.......\....\.....\beh.dat
.......\....\.....\_primary.dat
.......\....\....2\beh.asm
.......\....\.....\beh.dat
.......\....\.....\_primary.dat
.......\....\top_entity\str.asm
.......\....\..........\str.dat
.......\....\..........\_primary.dat
.......\....\_info
.......\....\add_g
.......\....\add_i
.......\....\adsu
.......\....\delay10
.......\....\load
.......\....\packi
.......\....\reg1
.......\....\regh
.......\....\result
.......\....\rom
.......\....\shift
.......\....\shi_1
.......\....\shi_2
.......\....\top_entity
.......\work
dctcode