Description: Complete a multi-cycle CPU design, quartus platform, Verilog implementation, includes lab reports, and a detailed menu of each module
- [mycpu] - Quartus II 5.0 written under a single bu
- [CPU] - Simple 16-bit CPU design of the VHDL cod
- [_8bitcpu] - 8 bit cpu vhdl design code not tested
- [AMBA] - AMBA 3.0 AXI TLM SystemsC
- [cpu] - verilog prepared by a simple CPU, for re
- [CPU] - vhdl cpu design
- [MIPS-C] - Beijing University of Aeronautics and As
- [mips] - MIPS CPU
- [CPU] - CPU design a complete water, quartus pla
- [MIPS_CPU] - A complete MIPS CPU design, innovative d
File list (Check if you may need any files):
CPU\quatus程序文件夹\MULTICLKCPU071221089\ALU.v
...\................\....................\db\MULTICLKCPU071221089.asm.qmsg
...\................\....................\..\MULTICLKCPU071221089.cbx.xml
...\................\....................\..\MULTICLKCPU071221089.cmp.bpm
...\................\....................\..\MULTICLKCPU071221089.cmp.cdb
...\................\....................\..\MULTICLKCPU071221089.cmp.ecobp
...\................\....................\..\MULTICLKCPU071221089.cmp.hdb
...\................\....................\..\MULTICLKCPU071221089.cmp.kpt
...\................\....................\..\MULTICLKCPU071221089.cmp.logdb
...\................\....................\..\MULTICLKCPU071221089.cmp.rdb
...\................\....................\..\MULTICLKCPU071221089.cmp.tdb
...\................\....................\..\MULTICLKCPU071221089.cmp0.ddb
...\................\....................\..\MULTICLKCPU071221089.cmp_merge.kpt
...\................\....................\..\MULTICLKCPU071221089.db_info
...\................\....................\..\MULTICLKCPU071221089.eco.cdb
...\................\....................\..\MULTICLKCPU071221089.eds_overflow
...\................\....................\..\MULTICLKCPU071221089.fit.qmsg
...\................\....................\..\MULTICLKCPU071221089.hier_info
...\................\....................\..\MULTICLKCPU071221089.hif
...\................\....................\..\MULTICLKCPU071221089.lpc.html
...\................\....................\..\MULTICLKCPU071221089.lpc.rdb
...\................\....................\..\MULTICLKCPU071221089.lpc.txt
...\................\....................\..\MULTICLKCPU071221089.map.bpm
...\................\....................\..\MULTICLKCPU071221089.map.cdb
...\................\....................\..\MULTICLKCPU071221089.map.ecobp
...\................\....................\..\MULTICLKCPU071221089.map.hdb
...\................\....................\..\MULTICLKCPU071221089.map.kpt
...\................\....................\..\MULTICLKCPU071221089.map.logdb
...\................\....................\..\MULTICLKCPU071221089.map.qmsg
...\................\....................\..\MULTICLKCPU071221089.map_bb.cdb
...\................\....................\..\MULTICLKCPU071221089.map_bb.hdb
...\................\....................\..\MULTICLKCPU071221089.map_bb.logdb
...\................\....................\..\MULTICLKCPU071221089.pre_map.cdb
...\................\....................\..\MULTICLKCPU071221089.pre_map.hdb
...\................\....................\..\MULTICLKCPU071221089.ram0_MULTICLKCPU071221089_9e314e93.hdl.mif
...\................\....................\..\MULTICLKCPU071221089.ram1_MULTICLKCPU071221089_9e314e93.hdl.mif
...\................\....................\..\MULTICLKCPU071221089.ram2_MULTICLKCPU071221089_9e314e93.hdl.mif
...\................\....................\..\MULTICLKCPU071221089.rpp.qmsg
...\................\....................\..\MULTICLKCPU071221089.rtlv.hdb
...\................\....................\..\MULTICLKCPU071221089.rtlv_sg.cdb
...\................\....................\..\MULTICLKCPU071221089.rtlv_sg_swap.cdb
...\................\....................\..\MULTICLKCPU071221089.sgate.rvd
...\................\....................\..\MULTICLKCPU071221089.sgate_sm.rvd
...\................\....................\..\MULTICLKCPU071221089.sgdiff.cdb
...\................\....................\..\MULTICLKCPU071221089.sgdiff.hdb
...\................\....................\..\MULTICLKCPU071221089.sim.cvwf
...\................\....................\..\MULTICLKCPU071221089.sim.hdb
...\................\....................\..\MULTICLKCPU071221089.sim.qmsg
...\................\....................\..\MULTICLKCPU071221089.sim.rdb
...\................\....................\..\MULTICLKCPU071221089.sld_design_entry.sci
...\................\....................\..\MULTICLKCPU071221089.sld_design_entry_dsc.sci
...\................\....................\..\MULTICLKCPU071221089.smp_dump.txt
...\................\....................\..\MULTICLKCPU0712210
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