Description: Each project examples include the project files of the project, source files, report files and generate the results files, the reader can use Quartus II or the software to directly open the corresponding. Design source file type according to the design input into the source code or schematic diagram, etc.
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File list (Check if you may need any files):
Example-b8-5\demo_project\counter.v
............\............\myvcdfile.vcd
............\............\tcounter.v
............\............\work\counter\verilog.asm
............\............\....\.......\_primary.dat
............\............\....\.......\_primary.vhd
............\............\....\test_counter\verilog.asm
............\............\....\............\_primary.dat
............\............\....\............\_primary.vhd
............\............\....\_info
............\Source\counter.v
............\......\tcounter.v
............\示例说明.doc
............\demo_project\work\counter
............\............\....\test_counter
............\............\work
............\demo_project
............\Source
Example-b8-5
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