Description: Based on VHDL language, by calling Xlinx FPGA development board produced by the nuclear DDS, sine signal. The simulation can be observed.
To Search:
File list (Check if you may need any files):
ISE_lab18\chipscope\STD_OUTPUT
.........\.........\bbfifo_16x8.vhd
.........\.........\blk_mem_gen_ds512.pdf
.........\.........\blk_mem_gen_release_notes.txt
.........\.........\chipscope.ise
.........\.........\chipscope.ise_ISE_Backup
.........\.........\chipscope.ntrc_log
.........\.........\chipscope.restore
.........\.........\chipscope_ise10migration.zip
.........\.........\chipscope_ise9migration.zip
.........\.........\cs_analyzer.ini
.........\.........\cs_analyzer.log
.........\.........\cs_analyzer_50001.log
.........\.........\cs_inserter.ini
.........\.........\cs_inserter.log
.........\.........\device_usage_statistics.html
.........\.........\kcpsm3.vhd
.........\.........\kcuart_rx.vhd
.........\.........\kcuart_tx.vhd
.........\.........\loopback.bgn
.........\.........\loopback.bit
.........\.........\loopback.bld
.........\.........\loopback.cmd_log
.........\.........\loopback.cpj
.........\.........\loopback.drc
.........\.........\loopback.lso
.........\.........\loopback.ncd
.........\.........\loopback.ngc
.........\.........\loopback.ngd
.........\.........\loopback.ngr
.........\.........\loopback.pad
.........\.........\loopback.par
.........\.........\loopback.pcf
.........\.........\loopback.prj
.........\.........\loopback.ptwx
.........\.........\loopback.stx
.........\.........\loopback.syr
.........\.........\loopback.twr
.........\.........\loopback.twx
.........\.........\loopback.ucf
.........\.........\loopback.unroutes
.........\.........\loopback.ut
.........\.........\loopback.vhd
.........\.........\loopback.xpi
.........\.........\loopback.xst
.........\.........\loopback_cs.blc
.........\.........\loopback_cs.cdc
.........\.........\loopback_cs.ngc
.........\.........\loopback_guide.ncd
.........\.........\loopback_map.map
.........\.........\loopback_map.mrp
.........\.........\loopback_map.ncd
.........\.........\loopback_map.ngm
.........\.........\loopback_map.xrpt
.........\.........\loopback_ngdbuild.xrpt
.........\.........\loopback_pad.csv
.........\.........\loopback_pad.txt
.........\.........\loopback_par.xrpt
.........\.........\loopback_prev_built.ngd
.........\.........\loopback_summary.html
.........\.........\loopback_summary.xml
.........\.........\loopback_usage.xml
.........\.........\loopback_vhdl.prj
.........\.........\loopback_xst.xrpt
.........\.........\my_dcm.vhd
.........\.........\my_dcm.xaw
.........\.........\my_dcm_arwz.ucf
.........\.........\program.asy
.........\.........\program.mif
.........\.........\program.ngc
.........\.........\program.sym
.........\.........\program.v
.........\.........\program.veo
.........\.........\program.vhd
.........\.........\program.vho
.........\.........\program.xco
.........\.........\program_blk_mem_gen_v2_1_xst_1.ngc_xst.xrpt
.........\.........\program_blk_mem_gen_v2_7_xst_1.ngc_xst.xrpt
.........\.........\program_flist.txt
.........\.........\program_xmdf.tcl
.........\.........\test.txt
.........\.........\uart_rx.vhd
.........\.........\uart_tx.vhd
.........\.........\user_idcode.lst
.........\.........\xaw2vhdl.log
.........\.........\xlnx_auto_0.ise
.........\.........\.st\work\hdllib.ref
.........\.........\...\....\hdpdeps.ref
.........\.........\...\....\sub00\vhpl00.vho
.........\.........\...\....\.....\vhpl01.vho
.........\.........\...\....\.....\vhpl02.vho
.........\.........\...\....\.....\vhpl03.vho
.........\.........\...\....\.....\vhpl04.vho
.........\.........\...\....\.....\vhpl05.vho
.........\.........\...\....\.....\vhpl06.vho
.........\.........\...\....\.....\vhpl07.vho
.........\.........\...\....\.....\vhpl08.vho
.........\.........\...\....\.....\vhpl09.vho
.........\.........\...\....\.....\vhpl10.vho
.........\.........\...\....\.....\vhpl11.vho