Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: Logicos Download
 Description: Is a Simple andOr, xor, sr circuit on Verilog and his testBench
 Downloaders recently: [More information of uploader yokoshima62]
 To Search:
File list (Check if you may need any files): 
circuito.v
sr.v
testBench.sv
andOr.v

CodeBus www.codebus.net