FPGA_A.Thien\Bao cao FPGA\Reference\Circuit design with VHDL by Volnei A. Pedroni.pdf
............\............\.........\DE1_user_manual\DE1_introduction_box.pdf
............\............\.........\...............\DE1_outline.pdf
............\............\.........\...............\DE1_UserManual_v1018.pdf
............\............\.........\...............\Getting Started with Altera DE1.pdf
............\............\.........\Perry VHDL Programming 4th.Ed.pdf
............\............\.........\Quartus Guidge\tut_quartus_intro_verilog.pdf
............\............\.........\..............\tut_quartus_intro_vhdl.pdf
............\............\..port\Final Report\Final_Report_No.7.doc
............\............\......\Report 1\FPGA Project.docx
............\............\......\........\Group7_k50.doc
............\............\......\........\slide 1.pptx
............\............\......\.......3\STOPWATCH – REPORT No 3-group 7.pptx
............\............\Simulation\Code mo phong\bodem-mophong\bodem.prj
............\............\..........\.............\.............\designer\impl1\counter.adb
............\............\..........\.............\.............\........\.....\counter.ide_des
............\............\..........\.............\.............\........\.....\counter.pdb
............\............\..........\.............\.............\........\.....\counter.pdb.depends
............\............\..........\.............\.............\........\.....\counter.tcl
............\............\..........\.............\.............\........\.....\counter_ba.sdf
............\............\..........\.............\.............\........\.....\counter_ba.vhd
............\............\..........\.............\.............\........\.....\........fp\counter.pro
............\............\..........\.............\.............\........\.....\..........\projectData\counter.pdb
............\............\..........\.............\.............\........\.....\simulation\postlayout\counter\def_arch.dat
............\............\..........\.............\.............\........\.....\..........\..........\.......\def_arch.dbs
............\............\..........\.............\.............\........\.....\..........\..........\.......\def_arch.psm
............\............\..........\.............\.............\........\.....\..........\..........\.......\_primary.dat
............\............\..........\.............\.............\........\.....\..........\..........\.......\_primary.dbs
............\............\..........\.............\.............\........\.....\..........\..........\stimulus\stimulator.dat
............\............\..........\.............\.............\........\.....\..........\..........\........\stimulator.dbs
............\............\..........\.............\.............\........\.....\..........\..........\........\stimulator.psm
............\............\..........\.............\.............\........\.....\..........\..........\........\_primary.dat
............\............\..........\.............\.............\........\.....\..........\..........\........\_primary.dbs
............\............\..........\.............\.............\........\.....\..........\..........\testbench\tbgeneratedcode.dat
............\............\..........\.............\.............\........\.....\..........\..........\.........\tbgeneratedcode.dbs
............\............\..........\.............\.............\........\.....\..........\..........\.........\tbgeneratedcode.psm
............\............\..........\.............\.............\........\.....\..........\..........\.........\_primary.dat
............\............\..........\.............\.............\........\.....\..........\..........\.........\_primary.dbs
............\............\..........\.............\.............\........\.....\..........\..........\_info
............\............\..........\.............\.............\hdl\counter.vhd
............\............\..........\.............\.............\simulation\modelsim.ini
............\............\.....