Description: VHDL language with the password lock design, used to simulate the working process of lock. Completion of the core lock control function.
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File list (Check if you may need any files):
lock7.1\3erroralarm\cipher_top.acf
.......\...........\cipher_top.asm.rpt
.......\...........\cipher_top.done
.......\...........\cipher_top.dpf
.......\...........\cipher_top.fit.rpt
.......\...........\cipher_top.fit.summary
.......\...........\cipher_top.flow.rpt
.......\...........\cipher_top.hif
.......\...........\cipher_top.map.rpt
.......\...........\cipher_top.map.summary
.......\...........\cipher_top.mmf
.......\...........\cipher_top.ndb
.......\...........\cipher_top.pin
.......\...........\cipher_top.pof
.......\...........\cipher_top.qpf
.......\...........\cipher_top.qsf
.......\...........\cipher_top.qws
.......\...........\cipher_top.sim.rpt
.......\...........\CIPHER_TOP.sym
.......\...........\cipher_top.tan.rpt
.......\...........\cipher_top.tan.summary
.......\...........\cipher_top.vhd
.......\...........\cipher_top.vhd.bak
.......\...........\cipher_top.vwf
.......\...........\cipher_top_assignment_defaults.qdf
.......\...........\clkdiv_model.acf
.......\...........\clkdiv_model.fit
.......\...........\clkdiv_model.hif
.......\...........\clkdiv_model.mmf
.......\...........\clkdiv_model.ndb
.......\...........\clkdiv_model.pin
.......\...........\clkdiv_model.pof
.......\...........\clkdiv_model.qpf
.......\...........\clkdiv_model.qsf
.......\...........\clkdiv_model.qws
.......\...........\clkdiv_model.rpt
.......\...........\clkdiv_model.snf
.......\...........\CLKDIV_MODEL.sym
.......\...........\clkdiv_model.vhd
.......\...........\clk_div10.acf
.......\...........\clk_div10.fit
.......\...........\clk_div10.hif
.......\...........\clk_div10.mmf
.......\...........\clk_div10.ndb
.......\...........\clk_div10.pin
.......\...........\clk_div10.pof
.......\...........\clk_div10.qpf
.......\...........\clk_div10.qsf
.......\...........\clk_div10.qws
.......\...........\clk_div10.rpt
.......\...........\clk_div10.snf
.......\...........\CLK_DIV10.sym
.......\...........\clk_div10.vhd
.......\...........\clk_div20.acf
.......\...........\clk_div20.fit
.......\...........\clk_div20.hif
.......\...........\clk_div20.mmf
.......\...........\clk_div20.ndb
.......\...........\clk_div20.pin
.......\...........\clk_div20.pof
.......\...........\clk_div20.qpf
.......\...........\clk_div20.qsf
.......\...........\clk_div20.qws
.......\...........\clk_div20.rpt
.......\...........\clk_div20.snf
.......\...........\CLK_DIV20.sym
.......\...........\clk_div20.vhd
.......\...........\clk_div200.acf
.......\...........\clk_div200.fit
.......\...........\clk_div200.hif
.......\...........\clk_div200.mmf
.......\...........\clk_div200.ndb
.......\...........\clk_div200.pin
.......\...........\clk_div200.pof
.......\...........\clk_div200.qpf
.......\...........\clk_div200.qsf
.......\...........\clk_div200.qws
.......\...........\clk_div200.rpt
.......\...........\clk_div200.snf
.......\...........\CLK_DIV200.sym
.......\...........\clk_div200.vhd
.......\...........\comparator_model.acf
.......\...........\comparator_model.fit
.......\...........\comparator_model.hif
.......\...........\comparator_model.jam
.......\...........\comparator_model.jbc
.......\...........\comparator_model.mmf
.......\...........\comparator_model.ndb
.......\...........\comparator_model.pin
.......\...........\comparator_model.pof
.......\...........\comparator_model.qpf
.......\...........\comparator_model.qsf
.......\...........\comparator_model.qws
.......\...........\comparator_model.rpt
.......\...........\comparator_model.snf
.......\...........\COMPARATOR_MODEL.sym
.......\...........\comparator_model.vhd
.......\...........\comparator_model.vhd.bak
.......\...........\control_model.acf
.......\...........\control_model.asm.rpt
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